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US4404732A Expired / Lapsed US ⏱️ 0.0 years remaining

Self-aligned extended epitaxy mesfet fabrication process

Assignee: International Business Machines Corp
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Filing: 1981-12-07
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Granted: 1983-09-20
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Expires: 2001-12-07
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Abstract

Abstract A fabrication process for a gallium arsenide MESFET device is disclosed. A feature of the invention is placing a gate structure on the gallium arsenide substrate. Then a process including molecular beam epitaxy, grows epitaxial gallium arsenide on each respective side of the gate, forming a raised source region and a raised drain region. Gallium arsenide will not grow in a conductive state on top of a tungsten gate metal. The resulting MESFET device has a raised source and drain which significantly reduces the high resistance depleted surface adjacent to the gate which generally occurs in planer gallium arsenide MESFET devices. Furthermore, the MESFET channel region which is defined by the proximate edges of the source and the drain, is self-aligned with the edges of the gate by virtue of the insitu process for the formation of the source and drain, as described above.

Inventors

  • 👤 Thomas L. Andrade

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 11:02
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/161; H10D30/00; H10D30/60; H10D30/67; H10D30/6729; H10D30/6737; H10D30/6738; H10D30/674; H10D30/675; H10D30/80; H10D30/87; H10D62/80; H10D62/85; H10D64/00; H10D64/60; H10D64/64; H10P; H10P14/00; H10P14/20; H10P14/22; H10P14/29; H10P14/2901; H10P14/2907; H10P14/2911; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3421; H10P14/36; Y; Y10; Y10S; Y10S148/00; Y10S148/088; Y10S148/10; Y10S148/105; Y10S148/169; Y10S438/00; Y10S438/969

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 115 words
An improved fabrication process for forming a gallium arsenide MESFET device, comprising the steps of: forming an N-type gallium arsenide layer on a low conductivity substrate; forming a refractory gate electrode on a selected portion of the surface of said gallium arsenide layer; growing an epitaxial gallium arsenide raised source region on said gallium arsenide layer on a first side of said gate and simultaneously therewith growing a gallium arsenide raised drain region on said gallium arsenide layer on a second side of said gate opposite from said first side thereof, said source and drain regions being of N-type conductivity; whereby a self-aligned refractory gate MESFET device having a raised source and drain, is formed.
Claim 2
Dependent Claim 115 words
An improved fabrication process for forming a gallium arsenide MESFET device, comprising the steps of: forming an N-type gallium arsenide layer on a low conductivity substrate; forming a refractory gate electrode on a selected portion of the surface of said gallium arsenide layer; growing an epitaxial gallium arsenide raised source region on said gallium arsenide layer on a first side of said gate and simultaneously therewith growing a gallium arsenide raised drain region on said gallium arsenide layer on a second side of said gate opposite from said first side thereof, said source and drain regions being of N-type conductivity; whereby a self-aligned refractory gate MESFET device having a raised source and drain, is formed.
Claim 3
Dependent Claim 214 words
An improved fabrication process for forming a gallium arsenide MESFET device, comprising the steps of: forming a first N-type gallium arsenide layer on a low conductivity substrate; mesa etching said gallium arsenide layer for electrical isolation, defining a first side and an opposed second side thereof; depositing an oxide layer on said low conductivity substrate and adjacent to said first and second sides of said gallium arsenide layer; forming a high temperature resistant gate electrode on a selected portion of the surface of said gallium arsenide layer; depositing a second layer of gallium arsenide on the exposed surfaces of said oxide layer and said first gallium arsenide layer, forming polycrystalline gallium arsenide over said oxide layer and forming epitaxial gallium arsenide over said first gallium arsenide layer, said epitaxial portion of said second gallium arsenide layer forming a raised source region on said first gallium arsenide layer on a first side of said gate and simultaneously forming a raised drain region on said first gallium arsenide layer on a second side of said gate opposite from said first side thereof, said source and drain regions being of N-type conductivity; depositing ohmic contacts to said raised source and raised drain regions; whereby a self-aligned gate MESFET device having a raised source and drain, is formed.
Claim 4
Dependent Claim 214 words
An improved fabrication process for forming a gallium arsenide MESFET device, comprising the steps of: forming a first N-type gallium arsenide layer on a low conductivity substrate; mesa etching said gallium arsenide layer for electrical isolation, defining a first side and an opposed second side thereof; depositing an oxide layer on said low conductivity substrate and adjacent to said first and second sides of said gallium arsenide layer; forming a high temperature resistant gate electrode on a selected portion of the surface of said gallium arsenide layer; depositing a second layer of gallium arsenide on the exposed surfaces of said oxide layer and said first gallium arsenide layer, forming polycrystalline gallium arsenide over said oxide layer and forming epitaxial gallium arsenide over said first gallium arsenide layer, said epitaxial portion of said second gallium arsenide layer forming a raised source region on said first gallium arsenide layer on a first side of said gate and simultaneously forming a raised drain region on said first gallium arsenide layer on a second side of said gate opposite from said first side thereof, said source and drain regions being of N-type conductivity; depositing ohmic contacts to said raised source and raised drain regions; whereby a self-aligned gate MESFET device having a raised source and drain, is formed.
Claim 5
Dependent Claim 12 words
The process of claim 2, wherein said oxide layer is gallium oxide.
Claim 6
Dependent Claim 12 words
The process of claim 2, wherein said oxide layer is silicon oxide.
Claim 7
Dependent Claim 13 words
The process of claim 2, wherein said gate electrode is a refractory metal.
Claim 8
Dependent Claim 112 words
An improved fabrication process for forming a gallium arsenide MESFET device, comprising the steps of: forming a refractory gate electrode on a selected portion of the surface of a thin layer of gallium arsenide on a low conductivity substrate; epitaxially growing a gallium arsenide raised source region on said gallium arsenide substrate on a first side of said gate and simultaneously growing a gallium arsenide raised drain region on said gallium arsenide substrate on a second side of said gate opposite from said first side thereof, said thin layer of gallium arsenide therebetween forming a channel region; whereby a self-aligned refractory gate MESFET device having a raised source and drain, is formed.
Claim 9
Dependent Claim 112 words
An improved fabrication process for forming a gallium arsenide MESFET device, comprising the steps of: forming a refractory gate electrode on a selected portion of the surface of a thin layer of gallium arsenide on a low conductivity substrate; epitaxially growing a gallium arsenide raised source region on said gallium arsenide substrate on a first side of said gate and simultaneously growing a gallium arsenide raised drain region on said gallium arsenide substrate on a second side of said gate opposite from said first side thereof, said thin layer of gallium arsenide therebetween forming a channel region; whereby a self-aligned refractory gate MESFET device having a raised source and drain, is formed.
Claim 10
Dependent Claim 34 words
The process of claim 6 wherein said refractory gate electrode is composed of a material which is a member of the group consisting of tungsten, tungsten carbide, titanium carbide, tantalum carbide, and titanium nitride.
Claim 11
Dependent Claim 120 words
An improved fabrication process for forming a III-V semiconductor MESFET device, comprising the steps of: forming a high temperature resistant gate electrode on a selected portion of the surface of a thin layer of a III-V semiconductor on a low conductivity substrate; epitaxially growing a III-V semiconductor raised source region on said III-V semiconductor substrate on a first side of said gate and simultaneously growing a III-V semiconductor raised drain region on said III-V semiconductor substrate on a second side of said gate opposite from said first side thereof, said thin layer of III-V semiconductor therebetween forming a channel region; whereby a self-aligned gate MESFET device having a raised source and drain and a low contamination channel region, is formed.
Claim 12
Dependent Claim 120 words
An improved fabrication process for forming a III-V semiconductor MESFET device, comprising the steps of: forming a high temperature resistant gate electrode on a selected portion of the surface of a thin layer of a III-V semiconductor on a low conductivity substrate; epitaxially growing a III-V semiconductor raised source region on said III-V semiconductor substrate on a first side of said gate and simultaneously growing a III-V semiconductor raised drain region on said III-V semiconductor substrate on a second side of said gate opposite from said first side thereof, said thin layer of III-V semiconductor therebetween forming a channel region; whereby a self-aligned gate MESFET device having a raised source and drain and a low contamination channel region, is formed.
Claim 13
Dependent Claim 36 words
The process of claim 8, wherein said high temperature resistant gate electrode is composed of a material which is a member of the group consisting of tungsten, tungsten carbide, titanium carbide, tantalum carbide, and titanium nitride.
Claim 14
Dependent Claim 13 words
The process of claim 8, wherein said III-V semiconductor substrate is gallium arsenide.
Claim 15
Dependent Claim 15 words
The process of claim 10, wherein said III-V semiconductor source and drain are gallium arsenide.
Claim 16
Dependent Claim 36 words
The process of claim 11, wherein said high temperature resistant gate electrode is composed of a material which is a member of the group consisting of tungsten, tungsten carbide, titanium carbide, tantalum carbide, and titanium nitride.

References Cited (Backward Citations)

US3609477A Cited
US3943622A Cited
US4077111A Cited
JPS5338272A Cited
US4111725A Cited
US4336549A Cited
US4236166A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-09-19 1987-03-21 1987-09-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-09-19 1991-03-21 1991-09-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-09-19 1995-03-21 1995-09-20 $7700.00 Window Closed / Lapsed

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