Sense amplifier circuit for semiconductor memory device

Claim 2

A sense amplifier circuit comprising: first and second sensing transistors each having a control electrode; first and second load elements connected to respective ones of said first and second sensing transistors; a constant voltage supply termined connected to said first and second load elements; first and second input terminals coupled to respective ones of said control electrodes of said first and second sensing transistors; first and second output terminals coupled to respective connecting points of said first and second sensing transistors and said load elements; and a constant current supply connected between said first and second sensing transistors and a second constant voltage supply terminal; wherein said sensing transistors are bipolar type transistors, said load elements are MOS type transistors of a first channel type with the voltage applied between the gate and the source of said transistors being a constant value, said constant current supply comprising a MOS type transistor of a complementary channel type, and the conductance value of said load element is much larger than that of said constant current supply.

Claim 3

A sense amplifier circuit as recited in claim 1, wherein: each said load element is a P channel MOS transistor, said constant current supply comprises an N channel MOS transistor, and each of said bipolar transistors is an NPN type bipolar transistor, having a base electrode connected to one of said input terminals, an emitter electrode connected to said constant current supply, and a collector electrode connected to a respective one of said output terminals.

Claim 4

A sense amplifier circuit as recited in claim 2, comprising: third and fourth bipolar transistors, said first and second sensing transistors connected to said third and fourth bipolar transistors, respectively, so as to form respective Darlington connections, said third and fourth bipolar transistors connected to said first and second input terminals respectively.

Claim 5

A sense amplifier circuit as recited in claim 1, comprising: third and fourth bipolar transistors, said first and second sensing transistors connected to said third and fourth bipolar transistors, respectively, so as to form respective Darlington connections, said third and fourth bipolar transistors connected to said first and second input terminals respectively.

Claim 6

A sense amplifier circuit device comprising: a semiconductor substrate having one conductivity type; a plurality of well regions of the other conductivity type formed in said substrate; first and second bipolar type transistors each having a collector region which is one of said well regions, a base region of one conductivity type formed in said collector region and an emitter region of the other conductivity type formed in said base region; first and second load elements each having a source and a drain region of one conductivity type formed in one of said well regions, said drain regions connected to respective ones of said collector regions; a first constant voltage supply terminal coupled to the source regions of said first and second load elements; first and second input terminals coupled to respective ones of said base regions; first and second output terminals coupled to respective ones of said collector regions; a constant current supply element having a source and a drain region of the other conductivity type formed in said substrate, the drain region of said constant current supply element coupled to said emitter regions; and a second constant voltage supply terminal coupled to the source region of said constant current supply element; wherein the conductance value of said load element is much larger than that of said constant current supply element.

Claim 7

A sense amplifier circuit device comprising: a semiconductor substrate having one conductivity type; a plurality of well regions of the other conductivity type formed in said substrate; first and second bipolar type transistors each having a collector region which is one of said well regions, a base region of one conductivity type formed in said collector region and an emitter region of the other conductivity type formed in said base region; first and second load elements each having a source and a drain region of one conductivity type formed in one of said well regions, said drain regions connected to respective ones of said collector regions; a first constant voltage supply terminal coupled to the source regions of said first and second load elements; first and second input terminals coupled to respective ones of said base regions; first and second output terminals coupled to respective ones of said collector regions; a constant current supply element having a source and a drain region of the other conductivity type formed in said substrate, the drain region of said constant current supply element coupled to said emitter regions; and a second constant voltage supply terminal coupled to the source region of said constant current supply element; wherein the conductance value of said load element is much larger than that of said constant current supply element.