Patent US4649630A successfully refreshed from Google Patents.
US4649630A
Expired / Lapsed
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Process for dielectrically isolated semiconductor structure
Assignee: NXP USA Inc
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Filing: 1985-04-01
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Granted: 1987-03-17
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Expires: 2005-04-01
Abstract
Abstract A process is disclosed for controllably providing dielectrically isolated semiconductor regions having a uniform and well defined thickness. Grooves are formed in a first surface of a semiconductor substrate and then a dielectric layer is formed covering that surface and the grooves extending into the surface. A layer of backing material such as polycrystalline silicon is formed overlying the dielectric layer. A semiconductor substrate is then thinned to form a new surface with portions of the dielectric layer and backing material exposed at that surface. A semiconductor layer is epitaxially grown overlying the new surface with the semiconductor layer having a monocrystalline structure where it is grown on exposed regions of the original substrate and having a polycrystalline structure otherwise. An oxidation masking layer is formed overlying those portions of the semiconductor layer which have a monocrystalline structure. Those portions of the semiconductor layer which are not covered by the oxidation masking layer are then oxidized to form an oxide extending through the semiconductor layer to the underlying dielectric layer. This oxide plus the original dielectric layer thus surround and isolate individual regions in which a portion of the original substrate has an epitaxial layer of semiconductor material grown thereon.
Inventors
- 👤 Bernard W. Boland
- 👤 Paul W. Sanders
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 17:24
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/10; Y; Y10; Y10S; Y10S148/00; Y10S148/043; Y10S148/085; Y10S148/122; Y10S438/00; Y10S438/928; Y10S438/969; Y10S438/977
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
196 words
A process for controllably providing dielectrically isolated semiconductor regions which comprises the steps of: providing a semiconductor substrate having first and second surfaces; etching grooves in said first surface of said substrate; forming a layer comprising silicon dioxide covering said first surface and said grooves; forming a layer of backing material by depositing a quantity of polycrystalline silicon at a first temperature and then depositing a second quantity of polycrystalline silicon at a second temperature higher than said first temperature, said backing material overlying said layer comprising silicon dioxide; thinning said substrate by removing material from said second surface to form a new second surface exposing portions of said layer comprising silicon dioxide formed in said grooves and portions of said backing material; growing a semiconductor layer overlying said new second surface, said semiconductor layer having a monocrystalline structure where grown on exposed regions of said substrate and a polycrystalline structure otherwise; forming an oxidation masking layer over portions of said semiconductor layer having a monocrystalline structure; oxidizing portions of said semiconductor layer not covered by said oxidation masking layer to grow an oxide extending through said semiconductor layer to said portions of said backing material.
Claim 2
Dependent Claim
196 words
A process for controllably providing dielectrically isolated semiconductor regions which comprises the steps of: providing a semiconductor substrate having first and second surfaces; etching grooves in said first surface of said substrate; forming a layer comprising silicon dioxide covering said first surface and said grooves; forming a layer of backing material by depositing a quantity of polycrystalline silicon at a first temperature and then depositing a second quantity of polycrystalline silicon at a second temperature higher than said first temperature, said backing material overlying said layer comprising silicon dioxide; thinning said substrate by removing material from said second surface to form a new second surface exposing portions of said layer comprising silicon dioxide formed in said grooves and portions of said backing material; growing a semiconductor layer overlying said new second surface, said semiconductor layer having a monocrystalline structure where grown on exposed regions of said substrate and a polycrystalline structure otherwise; forming an oxidation masking layer over portions of said semiconductor layer having a monocrystalline structure; oxidizing portions of said semiconductor layer not covered by said oxidation masking layer to grow an oxide extending through said semiconductor layer to said portions of said backing material.
Claim 3
Dependent Claim
184 words
A process for controllably providing dielectrically isolated semiconductor regions which comprises the steps of: providing a semiconductor substrate having first and second surfaces; etching grooves in said first surface of said substrate; forming a dielectric layer covering said first surface and said grooves; forming a layer of backing material by depositing a quantity of polycrystalline silicon at a first temperature and then depositing a second quantity of polycrystalline silicon at a second temperature higher than said first temperature, said backing material overlying said dielectric layer; thinning said substrate by removing material from said second surface to form a new second surface exposing portions of said dielectric layer formed in said grooves; growing a semiconductor layer overlying said new second surface, said semiconductor layer having a monocrystalline structure where grown on exposed regions of said substrate and a polycrystalline structure otherwise; forming an oxidation masking layer over portions of said semiconductor layer having a monocrystalline structure; oxidizing portions of said semiconductor layer not covered by said oxidation masking layer to grow an oxide extending through said semiconductor layer to said portions of said backing material.
Claim 4
Dependent Claim
184 words
A process for controllably providing dielectrically isolated semiconductor regions which comprises the steps of: providing a semiconductor substrate having first and second surfaces; etching grooves in said first surface of said substrate; forming a dielectric layer covering said first surface and said grooves; forming a layer of backing material by depositing a quantity of polycrystalline silicon at a first temperature and then depositing a second quantity of polycrystalline silicon at a second temperature higher than said first temperature, said backing material overlying said dielectric layer; thinning said substrate by removing material from said second surface to form a new second surface exposing portions of said dielectric layer formed in said grooves; growing a semiconductor layer overlying said new second surface, said semiconductor layer having a monocrystalline structure where grown on exposed regions of said substrate and a polycrystalline structure otherwise; forming an oxidation masking layer over portions of said semiconductor layer having a monocrystalline structure; oxidizing portions of said semiconductor layer not covered by said oxidation masking layer to grow an oxide extending through said semiconductor layer to said portions of said backing material.
Claim 5
Dependent Claim
14 words
The process of claim 4 wherein said first temperature is about 950-1130 degrees Celsius.
Claim 6
Dependent Claim
14 words
The process of claim 3 wherein said second temperature is about 1200 degrees Celsius.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-16 | 1990-09-15 | 1991-03-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-16 | 1994-09-15 | 1995-03-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-16 | 1998-09-15 | 1999-03-17 | $7700.00 | Window Closed / Lapsed |