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US3954522A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrated circuit process

Assignee: Motorola Solutions Inc
•
Filing: 1973-06-28
•
Granted: 1976-05-04
•
Expires: 1993-06-28
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Abstract

Abstract In the manufacture of semiconductor components, more radiation tolerant semiconductors are accomplished by growing a uniform epitaxial collector region on a dielectrically isolated substrate having islands of high conductivity semiconductor material.

Inventors

  • 👤 Donald K. Roberson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 09:23
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/67; H10D84/673; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/10; Y; Y10; Y10S; Y10S148/00; Y10S148/05; Y10S148/051; Y10S148/085; Y10S148/115; Y10S148/122; Y10S438/00; Y10S438/969; Y10S438/977

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 120 words
A method of manufacturing a monolithic integrated circuit comprising the steps of: a. providing a starting substrate of silicon semiconductor material having a high conductivity of a first type; b. masking and etching a first surface of said starting substrate to form notches; c. covering the notched surface of said starting substrate with a dielectric layer; d. depositing a polycrystalline silicon handle on the dielectric layer; e. lapping the second surface of the starting substrate to expose the dielectric layer in the notches and form islands; and f. epitaxially depositing a layer of monocrystalline silicon of the same conductivity on the remaining surface of the starting substrate while forming insulatory polycrystalline silicon on the areas above the exposed dielectric layer.
Claim 2
Independent Claim 120 words
A method of manufacturing a monolithic integrated circuit comprising the steps of: a. providing a starting substrate of silicon semiconductor material having a high conductivity of a first type; b. masking and etching a first surface of said starting substrate to form notches; c. covering the notched surface of said starting substrate with a dielectric layer; d. depositing a polycrystalline silicon handle on the dielectric layer; e. lapping the second surface of the starting substrate to expose the dielectric layer in the notches and form islands; and f. epitaxially depositing a layer of monocrystalline silicon of the same conductivity on the remaining surface of the starting substrate while forming insulatory polycrystalline silicon on the areas above the exposed dielectric layer.
Claim 3
Dependent Claim 41 words
A method as recited in claim 1 wherein said islands of high conductivity material have doping concentrations of between 10 17 and 10 21 atoms/cc. and same epitaxial layer has a doping concentration of about 10 15 to 10 16 atoms/cc.
Claim 4
Dependent Claim 54 words
A method as recited in claim 2 wherein said islands of high conductivity semiconductor material include at least one island of the opposite conductivity and further including the steps of converting the portion of the epitaxial layer of the same conductivity type overlying the island of the opposite conductivity type to opposite conductivity material.

References Cited (Backward Citations)

FR1421618A Cited
US3587166A Cited
US3454835A Cited
US3725146A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-05-04 1979-11-03 1980-05-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-05-04 1983-11-03 1984-05-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-05-04 1987-11-03 1988-05-04 $7700.00 Window Closed / Lapsed

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