Method for more uniformly spacing features in a semiconductor monolithic integrated circuit

Claim 2

A photolithographic method of more predictably and uniformly spacing features on a surface of a semiconductor device comprising: masking a semiconductor surface to delineate an adjacent pair of surface areas in which boundaries of one area are negatively defined and boundaries of the other feature are positively defined, effective to separate the so-defined surface areas by both negatively and positively defined surface areas therebetween; forming a surface feature on one of the aforesaid pair of surface areas masking while retaining the aforesaid definition of the other surface area and also retaining the aforesaid dual definition of separation therebetween; and forming a surface feature on the other of the aforesaid pair of surface areas, while still retaining a dual definition of separation therebetween; whereby the two surface features can be predictably and uniformly spaced as formed, regardless of swelling or shrinkage in photoresist used to delineate the boundaries of the aforesaid surface areas or in successively forming the aforesaid surface features.

Claim 3

A photolithographic method of making more predictably spaced doped areas on a semiconductor surface comprising: photolithographically defining a first dielectric mask on a semiconductor substrate surface to delineate an adjacent pair of surface areas in which boundaries of one area are defined by a first window and boundaries of the other area are defined by a patch, whereby the two surface areas are separated by a portion of masking material and a second window in the masking material, effective to predictably space the first window and the dielectric patch, regardless of non-predictable photoresist anomalies; doping one of the pair of surface areas through the first window while retaining the dielectric patch on the other surface area, wherein the patch remains predictably spaced from the one surface area; covering both of the aforesaid windows with a second dielectric that leaves the patch of first dielectric exposed; selectively removing the patch by means of an etchant selective to the first dielectric, to thereby expose the other of the pair of surface areas and retain its predictable spacing from said one surface area; and doping the exposed other semiconductor surface area.

Claim 4

A photolithographic method of making more predictably spaced doped areas on a semiconductor surface comprising: photolithographically defining a first dielectric mask on a semiconductor substrate surface to delineate an adjacent pair of surface areas in which boundaries of one area are defined by a first window and boundaries of the other area are defined by a patch, whereby the two surface areas are separated by a portion of masking material and a second window in the masking material, effective to predictably space the first window and the dielectric patch, regardless of non-predictable photoresist anomalies; doping one of the pair of surface areas through the first window while retaining the dielectric patch on the other surface area, wherein the patch remains predictably spaced from the one surface area; covering both of the aforesaid windows with a second dielectric that leaves the patch of first dielectric exposed; selectively removing the patch by means of an etchant selective to the first dielectric, to thereby expose the other of the pair of surface areas and retain its predictable spacing from said one surface area; and doping the exposed other semiconductor surface area.

Claim 5

A photolithographic method of making more predictably spaced regions of one conductivity type on a silicon semiconductor surface portion of opposite conductivity type, comprising: photolithographically defining a silicon nitride mask on an N-type semiconductor substrate surface portion to delineate an adjacent pair of surface areas in which boundaries of one surface area are defined by a first window in the silicon nitride and boundaries of the other surface area are defined by a silicon nitride patch, whereby the two surface areas are separated by a strip of silicon nitride and a second window area in the silicon nitride effective to allow photoresist used in defining the silicon nitride mask to shrink or swell after exposure without changing separation distance between corresponding boundaries of the first window and the patch; doping the one semiconductor surface area to the one conductivity type through the first window, while retaining the aforesaid silicon nitride patch on the other surface area, whereby the other surface area remains predictably spaced from the one surface area; oxidizing the silicon exposed in both of the windows; selectively removing the silicon nitride patch by means of an etchant selective silicon nitride but not silicon oxide and thereby expose the other semiconductor surface area, which is predictably spaced from said one area; and doping the exposed other semiconductor surface area to the one conductivity type.

Claim 6

A photolithographic method of making more predictably spaced regions of one conductivity type on a silicon semiconductor surface portion of opposite conductivity type, comprising: photolithographically defining a silicon nitride mask on an N-type semiconductor substrate surface portion to delineate an adjacent pair of surface areas in which boundaries of one surface area are defined by a first window in the silicon nitride and boundaries of the other surface area are defined by a silicon nitride patch, whereby the two surface areas are separated by a strip of silicon nitride and a second window area in the silicon nitride effective to allow photoresist used in defining the silicon nitride mask to shrink or swell after exposure without changing separation distance between corresponding boundaries of the first window and the patch; doping the one semiconductor surface area to the one conductivity type through the first window, while retaining the aforesaid silicon nitride patch on the other surface area, whereby the other surface area remains predictably spaced from the one surface area; oxidizing the silicon exposed in both of the windows; selectively removing the silicon nitride patch by means of an etchant selective silicon nitride but not silicon oxide and thereby expose the other semiconductor surface area, which is predictably spaced from said one area; and doping the exposed other semiconductor surface area to the one conductivity type.

Claim 7

A photolithographic method of making more predictably spaced regions of one conductivity type on a silicon semiconductor surface portion of opposite conductivity type, comprising: photolithographically defining a silicon nitride mask on a semiconductor surface portion of one conductivity type to delineate an adjacent pair of silicon surface areas in which boundaries of one surface area are defined by a first window in the silicon nitride and boundaries of the other surface area are defined by a silicon nitride patch, whereby the two surface areas are separated by a strip of silicon nitride and a second window area in the silicon nitride effective to allow photoresist used in defining the silicon nitride mask to shrink or swell after exposure without changing separation distance between corresponding boundaries of the first window and the patch; covering areas outside the first window with an ion implant impenetrable coating; implanting the one surface area through the first window with ions opposite to the one conductivity type, while retaining the aforesaid silicon nitride patch on the other surface area, whereby the other surface area remains predictably spaced from the one surface area; oxidizing the silicon surface exposed in both of the windows; covering areas outside said silicon nitride patch with an ion implant impenetrable coating; selectively removing the silicon nitride patch by etching, to thereby expose the other of said pair of surface areas, and retain its predictable spacing from said one area; and implanting the exposed other surface area with ions opposite to the one conductivity type.

Claim 8

A photolithographic method of making more predictably spaced regions of one conductivity type on a silicon semiconductor surface portion of opposite conductivity type, comprising: photolithographically defining a silicon nitride mask on a semiconductor surface portion of one conductivity type to delineate an adjacent pair of silicon surface areas in which boundaries of one surface area are defined by a first window in the silicon nitride and boundaries of the other surface area are defined by a silicon nitride patch, whereby the two surface areas are separated by a strip of silicon nitride and a second window area in the silicon nitride effective to allow photoresist used in defining the silicon nitride mask to shrink or swell after exposure without changing separation distance between corresponding boundaries of the first window and the patch; covering areas outside the first window with an ion implant impenetrable coating; implanting the one surface area through the first window with ions opposite to the one conductivity type, while retaining the aforesaid silicon nitride patch on the other surface area, whereby the other surface area remains predictably spaced from the one surface area; oxidizing the silicon surface exposed in both of the windows; covering areas outside said silicon nitride patch with an ion implant impenetrable coating; selectively removing the silicon nitride patch by etching, to thereby expose the other of said pair of surface areas, and retain its predictable spacing from said one area; and implanting the exposed other surface area with ions opposite to the one conductivity type.

Claim 9

A photolithographic method of making more predictably spaced regions of one conductivity type on a silicon semiconductor surface portion of opposite conductivity type, comprising: photolithographically defining a silicon nitride mask on an N-type semiconductor surface portion of one conductivity type to delineate an adjacent pair of silicon surface areas in which boundaries of one surface area are defined by a first window in the silicon nitride and boundaries of the other surface area are defined by a silicon nitride patch, whereby the two surface areas are separated by a strip of silicon nitride and a second window area in the silicon nitride effective to allow photoresist used in defining the silicon nitride mask to shrink or swell after exposure without changing separation distance between corresponding boundaries of the first window and the patch; oxidizing the silicon exposed in both of the windows; selectively etching away silicon oxide in the first window to retain the aforesaid silicon nitride patch and its predictable spacing from the first window; diffusing the one silicon surface area exposed in the first window with an impurity opposite to the one conductivity type; selectively etching away the silicon nitride patch, to expose the other of said pair of silicon surface areas while retaining its predictable spacing from the one of said pair of silicon surface areas; and diffusing the exposed other silicon surface area with an impurity opposite to the one conductivity type.

Claim 10

A photolithographic method of making more predictably spaced regions of one conductivity type on a silicon semiconductor surface portion of opposite conductivity type, comprising: photolithographically defining a silicon nitride mask on an N-type semiconductor surface portion of one conductivity type to delineate an adjacent pair of silicon surface areas in which boundaries of one surface area are defined by a first window in the silicon nitride and boundaries of the other surface area are defined by a silicon nitride patch, whereby the two surface areas are separated by a strip of silicon nitride and a second window area in the silicon nitride effective to allow photoresist used in defining the silicon nitride mask to shrink or swell after exposure without changing separation distance between corresponding boundaries of the first window and the patch; oxidizing the silicon exposed in both of the windows; selectively etching away silicon oxide in the first window to retain the aforesaid silicon nitride patch and its predictable spacing from the first window; diffusing the one silicon surface area exposed in the first window with an impurity opposite to the one conductivity type; selectively etching away the silicon nitride patch, to expose the other of said pair of silicon surface areas while retaining its predictable spacing from the one of said pair of silicon surface areas; and diffusing the exposed other silicon surface area with an impurity opposite to the one conductivity type.

Claim 15

applying a blanket coating of silicon nitride to a silicon semiconductor surface portion of one conductivity type; applying a blanket first coating of photoresist over the silicon nitride coating; exposing and developing the photoresist to define a patch of photoresist, a first concentric annular space around the patch, a concentric ring of photoresist around the first annular space, and a second concentric annular space around the concentric ring; etching away the silicon nitride exposed within both the annular spaces to form concentric inner and outer windows around an island in the silicon nitride coating, and then removing the first photoresist coating; covering the island and inner annular window of the semiconductor surface portion with a second coating of photoresist; exposing the surface portion to an ion beam of a conductivity-type dopant opposite to that dominant in the surface region, effective to form a lateral transistor annular collector region only within the outer annular window; removing the second photoresist coating and oxidizing silicon exposed within the windows to at least form a silicon oxide ring surrounding the silicon nitride island; selectively etching away the silicon nitride island and thereby exposing an emitter island surface area, the outer periphery of which is defined by the inner periphery of the silicon oxide ring and is precisely located with respect to the inner periphery of the annular collector region; and exposing the surface portion again to the opposite conductivity-type impurity, effective to convert the exposed emitter island surface area to a lateral transistor emitter region, wherein the silicon oxide ring precisely concentrically defines the outer periphery of the emitter region with respect to the inner periphery of the annular collector region and provides a lateral transistor of more predictable gain.

Claim 16

applying a blanket coating of silicon nitride to a silicon semiconductor surface portion of one conductivity type; applying a blanket first coating of photoresist over the silicon nitride coating; exposing and developing the photoresist to define a patch of photoresist, a first concentric annular space around the patch, a concentric ring of photoresist around the first annular space, and a second concentric annular space around the concentric ring; etching away the silicon nitride exposed within both the annular spaces to form concentric inner and outer windows around an island in the silicon nitride coating, and then removing the first photoresist coating; covering the island and inner annular window of the semiconductor surface portion with a second coating of photoresist; exposing the surface portion to an ion beam of a conductivity-type dopant opposite to that dominant in the surface region, effective to form a lateral transistor annular collector region only within the outer annular window; removing the second photoresist coating and oxidizing silicon exposed within the windows to at least form a silicon oxide ring surrounding the silicon nitride island; selectively etching away the silicon nitride island and thereby exposing an emitter island surface area, the outer periphery of which is defined by the inner periphery of the silicon oxide ring and is precisely located with respect to the inner periphery of the annular collector region; and exposing the surface portion again to the opposite conductivity-type impurity, effective to convert the exposed emitter island surface area to a lateral transistor emitter region, wherein the silicon oxide ring precisely concentrically defines the outer periphery of the emitter region with respect to the inner periphery of the annular collector region and provides a lateral transistor of more predictable gain.