Cooled semiconductor power module including structured strain buffers without dry interfaces

Claim 2

A cooled electronic semiconductor device for operation at high power levels with reduced internal stress comprising: a silicon wafer with at least first and second electrodes on opposite sides of said wafer; a first metallic layer atop said first electrode and joined thereto; a second metallic layer atop said first metallic layer and joined thereto; a first structured copper strain buffer including a bundle of substantially parallel closely packed strands of copper of substantially equal length, said first strain buffer having first and second opposed surfaces, one common end of said strands being thermo-compression diffusion bonded to a first metallic sheet so as to form said first opposed surface, the remaining second opposed surface of said first strain buffer being thermo-compression diffusion bonded to said second metallic layer; first metallic heat sinking means for providing cooling of said device thermo-compression diffusion bonded to said first metallic sheet; a third metallic layer below said second electrode and joined thereto; a fourth metallic layer below said third metallic layer and joined thereto; a second structured copper strain buffer including a bundle of substantially parallel, closely packed, strands of copper of substantially equal length, said second strain buffer having third and fourth opposed surfaces, one common end of said strands being thermo-compression diffusion bonded to a second metallic sheet so as to form said fourth opposed surface, the remaining third opposed surface of said second strain buffer being thermo-compression diffusion bonded to said fourth metallic layer; and second metallic heat sinking means for providing cooling of said device thermo-compression diffusion bonded to said second metallic sheet.

Claim 3

The electronic semiconductor device of claim 1 wherein said first strain buffer includes a third metallic sheet thermo-compression diffusion bonded to the remaining common end of the strands of said first strain buffer so as to form said second opposed surface.

Claim 4

The electronic semiconductor device of claim 2 wherein said second strain buffer includes a fourth metallic sheet thermo-compression diffusion bonded to the remaining common end of the strands of said second strain buffer so as to form said third opposed surface.

Claim 5

The electronic semiconductor device of claim 1 wherein each of said first and second metallic heat sinking means respectively comprises a block including a chamber with at least one inlet and at least one outlet for transporting heat conducting fluid therethrough.

Claim 6

The electronic semiconductor device of claim 3 wherein each of said first and second metallic heat sinking means respectively comprises a block including a chamber with at at least one inlet and at least one outlet for transporting heat conducting fluid therethrough.

Claim 7

The electronic semiconductor device of claim 1 wherein each of said first and second metallic heat sinking means respectively comprises a block including a plurality of fin-like projections for dissipation of heat energy applied to said first and second heat sinking means.

Claim 8

The electronic semiconductor device of claim 3 wherein each of said first and second metallic heat sinking means respectively comprises a block including a plurality of fin-like projections for dissipation of heat energy applied to said first and second heat sinking means.

Claim 9

The electronic semiconductor device of claims 4, 5, 6 or 7 wherein said first and second metallic layers are comprised of one of the group consisting of titanium, chromium and nickel and said second and fourth metalic layers are comprised of one of the group consisting of silver, gold and copper.

Claim 10

The electronic semiconductor device of claims 1, 4, 5, 6 or 7 wherein said silicon wafer comprises a thyristor, said first and second electrodes comprising cathode and anode electrodes, respectively, said thyristor including a gate electrode, said semiconductor device including gate connecting means for providing electrical connection to said gate electrode.

Claim 11

A cooled electronic semiconductor device for operation at high power levels with reduced internal stress comprising: a silicon wafer with at least first and second electrodes on opposite sides thereof; a first metalic layer atop said first electrode and joined thereto; a second metallic layer atop said first metallic layer and joined thereto; a first structured copper strain buffer including a bundle of substantially parallel, closely packed, strands of copper of substantially equal length, said first strain buffer having first and second opposed surfaces, one common end of said strands being thermo-compression diffusion bonded to a first metallic sheet so as to form said first opposed surface, the remaining second opposed surface of said first strain buffer being thermo-compression diffusion bonded to said second metallic layer; first metallic heat sinking means for providing cooling of said device thermo-compression diffusion bonded into said first metallic sheet; a metallic support plate situated below the second electrode of said silicon wafer and operatively joined thereto; a third metallic layer below said support plate and joined thereto; a fourth metallic layer below said third metallic layer and joined thereto; a second structured copper strain buffer including a bundle of substantially parallel, closely packed, strands of copper of substantially equal length, said second strain buffer having third and fourth opposed surfaces, one common end of said strands being thermo-compression diffusion bonded to a second metallic sheet so as to form said fourth opposed surface, the remaining third opposed surface of said second strain buffer being thermo-compression diffusion bonded to said fourth metallic layer; and second metallic heat sinking means for providing cooling of said device thermo-compression diffusion bonded into said second metallic sheet.

Claim 12

A cooled electronic semiconductor device for operation at high power levels with reduced internal stress comprising: a silicon wafer with at least first and second electrodes on opposite sides thereof; a first metalic layer atop said first electrode and joined thereto; a second metallic layer atop said first metallic layer and joined thereto; a first structured copper strain buffer including a bundle of substantially parallel, closely packed, strands of copper of substantially equal length, said first strain buffer having first and second opposed surfaces, one common end of said strands being thermo-compression diffusion bonded to a first metallic sheet so as to form said first opposed surface, the remaining second opposed surface of said first strain buffer being thermo-compression diffusion bonded to said second metallic layer; first metallic heat sinking means for providing cooling of said device thermo-compression diffusion bonded into said first metallic sheet; a metallic support plate situated below the second electrode of said silicon wafer and operatively joined thereto; a third metallic layer below said support plate and joined thereto; a fourth metallic layer below said third metallic layer and joined thereto; a second structured copper strain buffer including a bundle of substantially parallel, closely packed, strands of copper of substantially equal length, said second strain buffer having third and fourth opposed surfaces, one common end of said strands being thermo-compression diffusion bonded to a second metallic sheet so as to form said fourth opposed surface, the remaining third opposed surface of said second strain buffer being thermo-compression diffusion bonded to said fourth metallic layer; and second metallic heat sinking means for providing cooling of said device thermo-compression diffusion bonded into said second metallic sheet.

Claim 13

The electronic semiconductor device of claim 10 wherein said first strain buffer includes a third metallic sheet thermo-compression diffusion bonded to the remaining common end of the strands of said first strain buffer so as to form said second opposed surface.

Claim 14

The electronic semiconductor device of claim 11 wherein said second strain buffer includes a fourth metallic sheet thermo-compression diffusion bonded to the remaining common end of the strands of said second strain buffer so as to form said third opposed surface.

Claim 15

The electronic semiconductor device of claim 10 wherein each of said first and second metallic heat sinking means respectively comprises a block including a chamber with at least one inlet and at least one outlet for transporting heat conducting fluid therethrough.

Claim 16

The electronic semiconductor device of claim 12 wherein each of said first and second metallic heat sinking means respectively comprises a block including a chamber with at least one inlet and at least one outlet for transporting heat conducting fluid therethrough.

Claim 17

The electronic semiconductor device of claim 10 wherein each of said first and second metallic heat sinking means respectively comprises a block including a plurality of fin-like projections for dissipation of heat energy applied to said first and second heat sinking means.

Claim 18

The electronic semiconductor device of claim 12 wherein each of said first and second metallic heat sinking means respectively comprises a block including a plurality of fin-like projections for dissipation of heat energy applied to said first and second heat sinking means.

Claim 19

The electronic semiconductor device of claims 13, 14, 15 or 16 wherein said first and third metallic layers are comprises of one of the group consisting of titanium, chromium and nickel and said second and fourth metallic layers are comprised of one of the group consisting of silver, gold and copper.

Claim 20

The electronic semiconductor device of claims 10 or 12 wherein said support plate is comprised of one of a group consisting of tungsten and molybdenum.

Claim 21

The electronic semiconductor device of claims 10, 13, 14, 15 or 16 wherein said silicon wafer comprises a thyristor, said first and second electrodes comprising cathode and anode electrodes, respectively, said thyristor including a gate electrode, said semiconductor device including gate connecting means for providing electrical connection to said gate electrode.

Claim 22

A cooled semiconductor device for operation of high power levels with reduced internal stress comprising: a silicon wafer with at least first and second electrodes on opposite sides of said wafer; a first metallic layer atop said first electrode and joined thereto; a second metallic layer atop said first metallic layer and joined thereto; a structured copper strain buffer including a bundle of substantially parallel, closely packed, strands of copper of substantially equal length, said strain buffer having first and second opposed surfaces, one common end of said strands being thermo-compression diffusion bonded to a first metallic sheet so as to form said first opposed surface, the remaining second opposed surface of said strain buffer being thermo-compression diffusion bonded to said second metallic layer; metallic heat sinking means for providing cooling of said device thermo-compression diffusion bonded to said first metallic sheet; and electrical contact means for making electrical connection to said device operatively connected to each electrode on the side of said wafer including said second electrode.

Claim 23

A cooled semiconductor device for operation of high power levels with reduced internal stress comprising: a silicon wafer with at least first and second electrodes on opposite sides of said wafer; a first metallic layer atop said first electrode and joined thereto; a second metallic layer atop said first metallic layer and joined thereto; a structured copper strain buffer including a bundle of substantially parallel, closely packed, strands of copper of substantially equal length, said strain buffer having first and second opposed surfaces, one common end of said strands being thermo-compression diffusion bonded to a first metallic sheet so as to form said first opposed surface, the remaining second opposed surface of said strain buffer being thermo-compression diffusion bonded to said second metallic layer; metallic heat sinking means for providing cooling of said device thermo-compression diffusion bonded to said first metallic sheet; and electrical contact means for making electrical connection to said device operatively connected to each electrode on the side of said wafer including said second electrode.

Claim 24

The electronic semiconductor device of claim 20 wherein said strain buffer includes a second metallic sheet thermo-compression diffusion bonded to the remaining common end of the strands of said strain buffer so as to form said second opposed surface.

Claim 25

A cooled semiconductor device for operation at high power levels with reduced internal stress comprising: a first metallic layer atop said first electrode and joined thereto; a second metallic layer atop said second electrode and joined thereto; a structured copper strain buffer including a bundle of substantially parallel, closely packed, strands of copper of substantially equal length, said strain buffer having first and second opposed surfaces, one common end of said strands being thermo-compression diffusion bonded to a first metallic sheet so as to form said first opposed surface, the remaining second opposed surface of said strain buffer being thermo-compression diffusion bonded to said second metallic layer; metallic heat sinking means for providing cooling of said device thermo-compression diffusion bonded to said first metallic sheet; a metallic support plate situated below the second electrode of said silicon wafer and operatively joined thereto; and electrical contact means for making electrical connection to said device operatively connected to said metallic support plate.

Claim 26

A cooled semiconductor device for operation at high power levels with reduced internal stress comprising: a first metallic layer atop said first electrode and joined thereto; a second metallic layer atop said second electrode and joined thereto; a structured copper strain buffer including a bundle of substantially parallel, closely packed, strands of copper of substantially equal length, said strain buffer having first and second opposed surfaces, one common end of said strands being thermo-compression diffusion bonded to a first metallic sheet so as to form said first opposed surface, the remaining second opposed surface of said strain buffer being thermo-compression diffusion bonded to said second metallic layer; metallic heat sinking means for providing cooling of said device thermo-compression diffusion bonded to said first metallic sheet; a metallic support plate situated below the second electrode of said silicon wafer and operatively joined thereto; and electrical contact means for making electrical connection to said device operatively connected to said metallic support plate.

Claim 27

The electronic semiconductor device of claim 22 wherein said strain buffer includes a second metallic sheet thermo-compression diffusion bonded to the remaining common end to the strands of said strain buffer so as to form said second opposed surface.