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US4272302A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making V-MOS field effect transistors utilizing a two-step anisotropic etching and ion implantation

Assignee: Halliburton Co
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Filing: 1979-09-05
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Granted: 1981-06-09
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Expires: 1999-09-05
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Abstract

Abstract A method of making V-MOS field effect transistors is disclosed wherein a masking layer is first formed over a surface of a crystalline substrate. An aperture is then formed in the masking layer to expose the surface of the substrate. An anisotropic etchant is applied to the exposed surface so that a groove having a decreasing width within increasing depth is formed. However, the etch is not allowed to go to completion with the result that a partially formed V-shaped groove is formed. Ions are accelerated through the aperture for implantation in the crystalline substrate in the lower portion of the partially formed V-shaped groove. Thereafter, an anisotropic etchant is reapplied to the partially formed V-shaped groove, and the etch is allowed to go to completion.

Inventors

  • 👤 Murzban D. Jhabvala

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 10:56
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D30/00; H10D30/60; H10D64/00; H10D64/01; H10D64/025; H10D64/027; H10P; H10P50/00; H10P50/60; H10P50/64; H10P50/642; H10P50/644

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 126 words
A method of making a V-MOS field effect transistor comprising the steps of: forming a masking layer over a surface of a crystalline substrate; opening an aperture in said masking layer to expose said surface of said substrate; applying an anisotropic etchant to said exposed surface to etch a groove in said crystalline substrate, said groove having a decreasing width with increasing depth; inhibiting the effect of said anisotropic etchant before the etch goes to completion so that a V-shaped groove is only partially formed; accelerating ions through said aperture for implantation in said crystalline substrate in the lower portion of the partially formed V-shaped groove; and thereafter reapplying an anisotropic etchant to said partially formed V-shaped groove and allowing the etch to go to completion.
Claim 2
Independent Claim 126 words
A method of making a V-MOS field effect transistor comprising the steps of: forming a masking layer over a surface of a crystalline substrate; opening an aperture in said masking layer to expose said surface of said substrate; applying an anisotropic etchant to said exposed surface to etch a groove in said crystalline substrate, said groove having a decreasing width with increasing depth; inhibiting the effect of said anisotropic etchant before the etch goes to completion so that a V-shaped groove is only partially formed; accelerating ions through said aperture for implantation in said crystalline substrate in the lower portion of the partially formed V-shaped groove; and thereafter reapplying an anisotropic etchant to said partially formed V-shaped groove and allowing the etch to go to completion.
Claim 3
Dependent Claim 31 words
The method of making a V-MOS field effect transistor as recited in claim 1 further including the step of: forming an oxide layer on the surfaces of the completed V-shaped groove.
Claim 4
Independent Claim 258 words
The method of making a V-MOS field effect transistor comprising the steps of: forming a masking layer over a surface of a crystalline substrate of one conductivity type; opening a first aperture in said masking layer to expose said surface of said substrate; forming a region of a second conductivity type in said substrate through said first aperture; forming an oxide layer over the exposed surface of said substrate to cover said region of said second conductivity type; thereafter opening a second aperture in said oxide layer to expose a surface over said region of said second conductivity type, said second aperture being smaller than said first aperture; applying an anisotropic etchant to said exposed surface over said region of said second conductivity type to etch a groove in said crystalline substrate, said groove having a decreasing width with increasing depth; inhibiting the effect of said anisotropic etchant before the etch goes to completion so that a V-shaped groove is only partially formed, the partially formed V-shaped groove penetrating said region of said second conductivity type and dividing it into two parts; accelerating ions through said second aperture for implantation in said crystalline substrate in the lower portion of the partially formed V-shaped groove, said ions forming a bridging diffusion region of said second conductivity type connecting the two parts of the region divided by said partially formed V-shaped groove; and thereafter reapplying an anisotropic etchant to said partially formed V-shaped groove and allowing the etch to go to completion, the completed V-shaped groove penetrating said bridging region.
Claim 5
Independent Claim 258 words
The method of making a V-MOS field effect transistor comprising the steps of: forming a masking layer over a surface of a crystalline substrate of one conductivity type; opening a first aperture in said masking layer to expose said surface of said substrate; forming a region of a second conductivity type in said substrate through said first aperture; forming an oxide layer over the exposed surface of said substrate to cover said region of said second conductivity type; thereafter opening a second aperture in said oxide layer to expose a surface over said region of said second conductivity type, said second aperture being smaller than said first aperture; applying an anisotropic etchant to said exposed surface over said region of said second conductivity type to etch a groove in said crystalline substrate, said groove having a decreasing width with increasing depth; inhibiting the effect of said anisotropic etchant before the etch goes to completion so that a V-shaped groove is only partially formed, the partially formed V-shaped groove penetrating said region of said second conductivity type and dividing it into two parts; accelerating ions through said second aperture for implantation in said crystalline substrate in the lower portion of the partially formed V-shaped groove, said ions forming a bridging diffusion region of said second conductivity type connecting the two parts of the region divided by said partially formed V-shaped groove; and thereafter reapplying an anisotropic etchant to said partially formed V-shaped groove and allowing the etch to go to completion, the completed V-shaped groove penetrating said bridging region.
Claim 6
Dependent Claim 84 words
The method of making a V-MOS field effect transistor as recited in claim 3 further including the steps of: forming an oxide layer on the surfaces of the completed V-shaped groove; opening third and fourth apertures in said oxide layer on either side of said completed V-shaped groove to expose surfaces over the divided parts of said region of said second conductivity type; and forming metallic electrodes on said exposed surfaces and on the oxide layer on the surfaces of the completed V-shaped groove.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-06-08 1984-12-08 1985-06-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-06-08 1988-12-08 1989-06-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-06-08 1992-12-08 1993-06-09 $7700.00 Window Closed / Lapsed

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