Patent US4112513A successfully refreshed from Google Patents.
US4112513A
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Method for refreshing storage contents of MOS memories
Assignee: Wincor Nixdorf International GmbH
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Filing: 1973-09-27
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Granted: 1978-09-05
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Expires: 1993-09-27
Abstract
Abstract A method for periodically refreshing dynamic MOS memories is provided in which the memory is divided into a number of separate memory sections, each containing a plurality of refresh locations, and the locations in one section are refreshed each time another of the sections is accessed for reading or writing. The refreshment of the refresh locations in each section is accomplished sequentially, and an index is maintained of which refresh locations have been refreshed during a refreshment period. At the conclusion of each such period, the remainder of the refresh locations in each section are refreshed. It is therefore unnecessary to restrict normal access to the memory for reading and writing during set periods which are set aside for the sole purpose of refreshing the memory contents, since refreshment occurs simultaneously with normal accessing. The mean access time is thereby decreased.
Inventors
- 👤 Peter Elsner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 16:35
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/406
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
66 words
A method for refreshing the contents of a dynamic MOS memory, having a plurality of independently addressable sections, including the steps of simultaneously refreshing all but one section of said memory concurrently with each normal access for reading or writing to said one section, said refreshment occurring during each normal access to said one section, said one section comprising any one of said plurality of sections.
Claim 2
Independent Claim
66 words
A method for refreshing the contents of a dynamic MOS memory, having a plurality of independently addressable sections, including the steps of simultaneously refreshing all but one section of said memory concurrently with each normal access for reading or writing to said one section, said refreshment occurring during each normal access to said one section, said one section comprising any one of said plurality of sections.
Claim 3
Independent Claim
62 words
A method for refreshing the contents of a dynamic MOS memory having first and second independently addressable sections, including the steps of refreshing said first section of said memory concurrently with each normal access for reading or writing to said second section of said memory, and refreshing said second section of said memory concurrently with each normal access to said first section.
Claim 4
Independent Claim
62 words
A method for refreshing the contents of a dynamic MOS memory having first and second independently addressable sections, including the steps of refreshing said first section of said memory concurrently with each normal access for reading or writing to said second section of said memory, and refreshing said second section of said memory concurrently with each normal access to said first section.
Claim 5
Independent Claim
123 words
A method for refreshing the contents of memory cells of a dynamic MOS memory having a plurality of independently addressable sections addressed by a common address register, including the steps of sequentially refreshing non-refreshed cells in a first section of said memory concurrently with each normal access for reading or writing to memory cells in a second section of said memory, defining a refreshment period for said first section during which either of said first and second sections may be accessed normally, manifesting the number of memory cells in said first section which have been sequentially refreshed during said refreshment period, and refreshing, at the end of said period, all of the memory cells within said first section not refreshed during said period.
Claim 6
Independent Claim
123 words
A method for refreshing the contents of memory cells of a dynamic MOS memory having a plurality of independently addressable sections addressed by a common address register, including the steps of sequentially refreshing non-refreshed cells in a first section of said memory concurrently with each normal access for reading or writing to memory cells in a second section of said memory, defining a refreshment period for said first section during which either of said first and second sections may be accessed normally, manifesting the number of memory cells in said first section which have been sequentially refreshed during said refreshment period, and refreshing, at the end of said period, all of the memory cells within said first section not refreshed during said period.
Claim 7
Dependent Claim
143 words
A dynamic MOS memory comprising a plurality of independently addressable memory sections, each containing a plurality of refresh locations, transcribing means for normally accessing one of said refresh locations in one of said sections for executing a reading or writing operation, refreshment means for simultaneously refreshing storage elements in all of the other ones of said sections concurrently with operation of said transcribing means, said refreshment means including addressing means comprising means for addressing the refresh locations of a selected one of a plurality of groups of locations, each of said groups including a plurality of locations in each of said memory sections and means for separately addressing the refresh locations of said groups at locations within said memory sections, said refreshment means also including means for simultaneously refreshing storage locations in each of said sections not being accessed by said transcribing means.
Claim 8
Dependent Claim
143 words
A dynamic MOS memory comprising a plurality of independently addressable memory sections, each containing a plurality of refresh locations, transcribing means for normally accessing one of said refresh locations in one of said sections for executing a reading or writing operation, refreshment means for simultaneously refreshing storage elements in all of the other ones of said sections concurrently with operation of said transcribing means, said refreshment means including addressing means comprising means for addressing the refresh locations of a selected one of a plurality of groups of locations, each of said groups including a plurality of locations in each of said memory sections and means for separately addressing the refresh locations of said groups at locations within said memory sections, said refreshment means also including means for simultaneously refreshing storage locations in each of said sections not being accessed by said transcribing means.
Claim 9
Dependent Claim
70 words
The method according to claim 1, including the step of dividing said memory into a plurality of groups, each of said groups including a plurality of refresh locations from each of said sections, simultaneously refreshing the refresh locations of one said group in all of said sections except said one section, and periodically simultaneously refreshing all of the refresh locations in said group which are unrefreshed during a predetermined period.
Claim 10
Dependent Claim
24 words
The method according to claim 5, including the steps of counting the refresh locations which are refreshed in each section during each said period.
Claim 11
Dependent Claim
33 words
The method according to claim 6, including the step of sequentially selecting said groups for refreshment, each said group being selected when all the refresh locations of the previous group have been refreshed.
Claim 12
Dependent Claim
78 words
Apparatus according to claim 4, wherein said addressing means comprises a group counter for selecting one of said groups, and means for incrementing said group counter after the expiration of each time interval equal to T.K.i./n, where T is the refreshment period of the memory, K is the number of memory sections, i is the number of refresh locations within a single group of a single section, and n is the number of refresh locations in the memory.
Claim 13
Dependent Claim
29 words
Apparatus according to claim 8, including means for delaying refreshment of said refresh locations following incrementing of said group counter, until the expiration of the next said time interval.
Claim 14
Dependent Claim
31 words
Apparatus according to claim 9, wherein said address means includes a separate refreshment counter for each memory section, for designating the next refresh location to be refreshed in its respective section.
Claim 15
Dependent Claim
48 words
Apparatus according to claim 10, including means for inhibiting refreshment in any memory section when the refreshment counter for such section is in a predetermined state, said state indicating that all refresh locations within the selected group of its section have been refreshed during the previous time interval.
Claim 16
Dependent Claim
42 words
Apparatus according to claim 10, including means for successively refreshing all of the refresh locations within a selected group in all of said sections, and means for incrementing said group counter when all of said refreshment counters have reached said predetermined state.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-09-04 | 1982-03-06 | 1982-09-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-09-04 | 1986-03-06 | 1986-09-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-09-04 | 1990-03-06 | 1990-09-05 | $7700.00 | Window Closed / Lapsed |