Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
134 words
A memory refresh system for selectively refreshing a memory element comprising a memory element capable of temporarily storing information in response to electrical input signals, conductive terminals connected to said memory element for receiving said input signals, electrical time measuring means for measuring a predetermined time limit corresponding to the maximum time period to be allowed before said memory element is to be refreshed and producing an output signal when such time limit is reached, said time measuring means being associated with said conductive terminals and being reset to its zero time condition whenever a storage input signal appears at said terminals, and means responsive to the output signal of said electrical time measuring means for initiating a refresh of said memory element only when said time measuring means reaches its predetermined time limit.
Claim 2
Dependent Claim
134 words
A memory refresh system for selectively refreshing a memory element comprising a memory element capable of temporarily storing information in response to electrical input signals, conductive terminals connected to said memory element for receiving said input signals, electrical time measuring means for measuring a predetermined time limit corresponding to the maximum time period to be allowed before said memory element is to be refreshed and producing an output signal when such time limit is reached, said time measuring means being associated with said conductive terminals and being reset to its zero time condition whenever a storage input signal appears at said terminals, and means responsive to the output signal of said electrical time measuring means for initiating a refresh of said memory element only when said time measuring means reaches its predetermined time limit.
Claim 3
Dependent Claim
35 words
The memory refresh system as in claim 1, wherein the time measuring means comprises a digital counter having a count rate and total count such that the product thereof corresponds to said maximum time period.
Claim 4
Dependent Claim
74 words
The memory refresh system as in claim 1 further including data utilization means capable of accessing said memory element through said conductive terminals, said data utilization means including program control means for selectively controlling the access to said memory element, and means responsive to said program control means for initiating a refresh of said memory element when access to said memory element is not required for a sufficiently long time to permit said refresh.
Claim 5
Dependent Claim
177 words
A memory refresh system for selectively refreshing any one of a plurality of memory elements only when a refresh is required, comprising a plurality of memory elements each capable of temporarily storing information in response to electrical input signals, a plurality of conductive terminals each connected to one of said memory elements for receiving input signals, a plurality of electrical time measuring means each associated with one of said memory elements for measuring a predetermined time limit corresponding to the maximum time period to be allowed before its associated memory element is to be refreshed, and producing an output signal at an output terminal when such time limit is reached, said plurality of time measuring means being associated with the respective conductive terminals and each being reset to its zero time condition whenever its associated memory element receives an input signal, and mandatory refresh means responsive to the output signal of each said electrical time measuring means for initiating a refresh of its associated memory element only when the time measuring means reaches its predetermined time limit.
Claim 6
Dependent Claim
177 words
A memory refresh system for selectively refreshing any one of a plurality of memory elements only when a refresh is required, comprising a plurality of memory elements each capable of temporarily storing information in response to electrical input signals, a plurality of conductive terminals each connected to one of said memory elements for receiving input signals, a plurality of electrical time measuring means each associated with one of said memory elements for measuring a predetermined time limit corresponding to the maximum time period to be allowed before its associated memory element is to be refreshed, and producing an output signal at an output terminal when such time limit is reached, said plurality of time measuring means being associated with the respective conductive terminals and each being reset to its zero time condition whenever its associated memory element receives an input signal, and mandatory refresh means responsive to the output signal of each said electrical time measuring means for initiating a refresh of its associated memory element only when the time measuring means reaches its predetermined time limit.
Claim 7
Dependent Claim
58 words
The memory refresh system as in claim 4, wherein said plurality of the time measuring means comprise a plurality of digital counters each having a count rate and total count such that the product thereof corresponds to the maximum time period for its associated memory element, and further including means to synchronize the count of said digital counters.
Claim 8
Dependent Claim
55 words
The memory refresh system as in claim 4, wherein said mandatory refresh means includes, means for scanning the output terminals of said time measuring means, and refresh circuit means connected to said scanning means for refreshing any of said memory elements when said scanning means senses an output signal on its associated time measuring means.
Claim 9
Dependent Claim
68 words
The memory refresh system as in claim 4, wherein said mandatory refresh means includes scanning means for scanning the output terminals of said time measuring means, and circuit means responsive to an output signal from any one of said time measuring means for initiating said scanning means and for inhibiting access to said memory elements, except for refresh purposes, when any one of said output signals is present.
Claim 10
Dependent Claim
80 words
The memory refresh system as in claim 4 further including data utilization means capable of accessing said memory elements through their associated conductive terminals, said data utilization means including program control means for selectively controlling access to said memory elements, and voluntary refresh means responsive to said program control means for initiating a refresh of at least one of said memory elements when access to said memory elements is not required for a sufficiently long time to permit such refresh.
Claim 11
Dependent Claim
178 words
A memory refresh system for selectively refreshing memory elements of a memory matrix comprising a matrix of memory elements arranged in rows and columns, each such memory element being capable of temporarily storing information in response to electrical input signals, a plurality of row conductors and a plurality of column conductors connected to said memory elements in a matrix pattern, a plurality of electrical time measuring means each associated with one of said row conductors for measuring a predetermined time limit corresponding to the maximum time period to be allowed before the memory elements connected to the row conductor are to be refreshed, and producing an output signal on an output terminal when such time limit is reached, each said time measuring means being reset to its zero time condition whenever a signal is applied to its corresponding row conductor, and mandatory refresh means responsive to the output signal of said electrical time measuring means for initiating a refresh of a row of said memory elements only when its connected time measuring means reaches its predetermined time limit.
Claim 12
Dependent Claim
178 words
A memory refresh system for selectively refreshing memory elements of a memory matrix comprising a matrix of memory elements arranged in rows and columns, each such memory element being capable of temporarily storing information in response to electrical input signals, a plurality of row conductors and a plurality of column conductors connected to said memory elements in a matrix pattern, a plurality of electrical time measuring means each associated with one of said row conductors for measuring a predetermined time limit corresponding to the maximum time period to be allowed before the memory elements connected to the row conductor are to be refreshed, and producing an output signal on an output terminal when such time limit is reached, each said time measuring means being reset to its zero time condition whenever a signal is applied to its corresponding row conductor, and mandatory refresh means responsive to the output signal of said electrical time measuring means for initiating a refresh of a row of said memory elements only when its connected time measuring means reaches its predetermined time limit.
Claim 13
Dependent Claim
49 words
The memory refresh system as in claim 9, wherein said plurality of time measuring means comprise a plurality of digital counters each having a count rate and total count such that the product thereof corresponds to said maximum time period, and further including means to synchronize said digital counters.
Claim 14
Dependent Claim
56 words
The memory refresh system as in claim 9, wherein said mandatory refresh means includes, means for scanning the output terminals of said time measuring means, and refresh circuit means connected to said scanning means for refreshing any row of said memory elements when said scanning means senses an output signals on its associated time measuring means.
Claim 15
Dependent Claim
68 words
The memory refresh system as in claim 9, where said mandatory refresh means includes scanning means for scanning the output terminals of said time measuring means, and circuit means responsive to an output signal from any one of said time measuring means for initiating said scanning means and for inhibiting access to said memory elements, except for refresh purposes, when any one of said output signals is present.
Claim 16
Dependent Claim
129 words
The memory refresh system as in claim 9, further including row decoding means for receiving row address signals and applying a select signal to one of said row conductors in accordance with the digit significance of each group of row address signals received, conductive means for applying a corresponding select signal to the time measuring means associated with the selected row conductor to reset said time measuring means to zero, an encoder responsive to an output signal from any one of said time measuring means to produce further row address signals, corresponding in digit significance to the row address of the row associated with the particular time measuring means that produced the output signal, and conductive means to apply said further row address signals to said row decoding means.
Claim 17
Dependent Claim
87 words
The memory refresh system as in claim 9 further including data utilization means capable of accessing said memory elements through said plurality of row conductors and column conductors, said data utilization means including program control means for sElectively controlling access to said memory elements, and voluntary refresh means responsive to said program control means for initiating a refresh of at least one of said row of said memory elements when access to said memory elements is not required for a sufficiently long time to permit such refresh.
Claim 18
Dependent Claim
84 words
The memory refresh system as in claim 14 wherein said voluntary refresh means includes means for scanning said plurality of electrical time measuring means to detect the means measuring a time closest to said maximum time period. refresh circuit means connected to said scanning means for refreshing the associated row of said memory elements of said detect electrical time measuring means, and means resetting said first time measuring circuit to its zero time conditions upon refresh of its associated row of said memory elements.
Claim 19
Independent Claim
85 words
A method for selectively refreshing the information stored in a memory element comprising the steps of counting toward a predetermined maximum count at a rate such that the time period required for said predetermined count corresponds to the maximum time period to be allowed before the memory element requires a refresh, interrupting said counting and starting over at zero whenever said memory element receives an information storage signal, and refreshing the information stored in said memory element only when said counting reaches said predetermined count.
Claim 20
Independent Claim
85 words
A method for selectively refreshing the information stored in a memory element comprising the steps of counting toward a predetermined maximum count at a rate such that the time period required for said predetermined count corresponds to the maximum time period to be allowed before the memory element requires a refresh, interrupting said counting and starting over at zero whenever said memory element receives an information storage signal, and refreshing the information stored in said memory element only when said counting reaches said predetermined count.
Claim 21
Dependent Claim
50 words
A method for selectively refreshing the information stored in a memory element as in claim 16 further including the steps of determining when access to memory element is not required for a sufficiently long time to permit refresh of said element, and voluntarily refreshing of said element during said time.
Claim 22
Independent Claim
122 words
A method for selectively refreshing the information stored in a matrix of memory elements arranged in rows and columns, comprising the steps of initiating a separate count toward a predetermined maximum count for each row of said matrix at a rate such that the time period required for the predetermined count corresponds to the maximum time period to be allowed before the memory elements of the corresponding row require a refresh, interrupting the counting and starting the count for such row over at zero whenever the memory elements of the row receive an information storage signal, and refreshing the information stored in selective ones of said rows of memory elements when only the counting for said selected rows reaches said predetermined count.
Claim 23
Independent Claim
122 words
A method for selectively refreshing the information stored in a matrix of memory elements arranged in rows and columns, comprising the steps of initiating a separate count toward a predetermined maximum count for each row of said matrix at a rate such that the time period required for the predetermined count corresponds to the maximum time period to be allowed before the memory elements of the corresponding row require a refresh, interrupting the counting and starting the count for such row over at zero whenever the memory elements of the row receive an information storage signal, and refreshing the information stored in selective ones of said rows of memory elements when only the counting for said selected rows reaches said predetermined count.
Claim 24
Dependent Claim
36 words
A method as in claim 18, further including observing each separate count sequentially to see if it has reached said predetermined count, and if so, refreshing the memory elements of the corresponding row of said matrix.
Claim 25
Dependent Claim
65 words
A method for selectively refreshing the information stored in a matrix of memory elements as in claim 18, further including the steps of determining when access to said memory elements is not required for a sufficiently long time to permit refresh of information stored in at least one of said rows of memory elements, and voluntarily refreshing said rows of memory elements during said time.