US6952573B2 — Wireless receiver with stacked, single chip archi…

Claim 1

Independent Claim 79 words

A monolithic wireless device, the wireless device comprising: a mixed-mode integrated circuit having a digital portion and an analog portion on a common die, wherein the analog portion comprises a radio frequency (RF) receiver circuit and wherein the digital portion comprises a signal processor in communication with the RF receiver circuit; and a memory device in electronic communication with the mixed-mode integrated circuit, wherein the memory device is configured to store electronic instructions and data for the signal processor.

Claim 2

Dependent Claim 79 words

A monolithic wireless device, the wireless device comprising: a mixed-mode integrated circuit having a digital portion and an analog portion on a common die, wherein the analog portion comprises a radio frequency (RF) receiver circuit and wherein the digital portion comprises a signal processor in communication with the RF receiver circuit; and a memory device in electronic communication with the mixed-mode integrated circuit, wherein the memory device is configured to store electronic instructions and data for the signal processor.

Claim 3

Dependent Claim 22 words

The wireless device of claim 1 , wherein the memory device is stacked with the mixed mode integrated circuit on a substrate.

Claim 4

Dependent Claim 19 words

The wireless device of claim 2 wherein the memory device is direct bonded to the mixed mode integrated circuit.

Claim 5

Dependent Claim 26 words

The wireless device of claim 2 wherein the memory device is electrically coupled to the mixed mode integrated circuit by package pins disposed on the substrate.

Claim 6

Dependent Claim 36 words

The wireless device of claim 1 wherein the RF receiver circuit operates within a frequency band and wherein the digital portion comprises a clock signal having a clock frequency that is provided to the signal processor.

Claim 7

Dependent Claim 30 words

The wireless device of claim 5 wherein the clock frequency is configured such that neither the clock frequency nor any harmonics of the clock frequency lie within the frequency band.

Claim 8

Dependent Claim 32 words

The wireless device of claim 6 wherein the RF receiver circuit comprises a filter tuned to remove a harmonic of the clock frequency from an analog signal propagating in the analog portion.

Claim 9

Dependent Claim 60 words

The wireless device of claim 5 wherein the RF receiver circuit comprises: an amplifier configured to receive an analog signal from an antenna; a mixer configured to mix the analog signal with an oscillator signal having a frequency within the frequency band; and an analog-to-digital converter configured to provide a digital equivalent of the analog signal to the signal processor.

Claim 10

Dependent Claim 19 words

The wireless device of claim 8 wherein the amplifier is a differential amplifier comprising at least two differential inputs.

Claim 11

Dependent Claim 46 words

The wireless device of claim 9 wherein the RF receiver circuit further comprises a filter coupled to one of the at least two differential inputs and tuned to remove at least a portion of the clock frequency from an analog signal propagating in the analog portion.

Claim 12

Dependent Claim 27 words

The wireless device of claim 1 wherein the analog portion and the digital portion are at least partially separated by a conducting trench in the common die.

Claim 13

Dependent Claim 16 words

The wireless device of claim 11 wherein the conducting trench is connected to an electrical ground.

Claim 14

Dependent Claim 34 words

The wireless device of claim 1 wherein the digital portion comprises a plurality of conducting members proximate to a surface of the common die to thereby form a Faraday cage about the digital portion.

Claim 15

Dependent Claim 146 words

A monolithic receiver for a global positioning system (GPS), the receiver comprising: a substrate; a mixed-mode integrated circuit coupled to the substrate and having a digital portion and an analog portion on a common die, wherein the analog portion comprises an RF receiver circuit operating within a frequency band and wherein the digital portion comprises a signal processor in communication with the RF receiver circuit, wherein the digital portion comprises a clock signal having a clock frequency provided to the signal processor, and wherein the clock frequency is selected such that neither the clock frequency nor any harmonics of the clock frequency lie within the frequency band; and a memory device stacked with the mixed-mode integrated circuit opposite the substrate and configured in electronic communication with the mixed-mode integrated circuit, wherein the memory device is configured to store electronic instructions and data for the signal processor.

Claim 16

Dependent Claim 146 words

A monolithic receiver for a global positioning system (GPS), the receiver comprising: a substrate; a mixed-mode integrated circuit coupled to the substrate and having a digital portion and an analog portion on a common die, wherein the analog portion comprises an RF receiver circuit operating within a frequency band and wherein the digital portion comprises a signal processor in communication with the RF receiver circuit, wherein the digital portion comprises a clock signal having a clock frequency provided to the signal processor, and wherein the clock frequency is selected such that neither the clock frequency nor any harmonics of the clock frequency lie within the frequency band; and a memory device stacked with the mixed-mode integrated circuit opposite the substrate and configured in electronic communication with the mixed-mode integrated circuit, wherein the memory device is configured to store electronic instructions and data for the signal processor.

Claim 17

Dependent Claim 37 words

The receiver of claim 14 wherein the analog portion and the digital portion are at least partially separated by a conducting trench in the common die, and wherein the conducting trench is connected to an electrical ground.

Claim 18

Dependent Claim 146 words

A wireless receiver provided on a common die in communication with an antenna, the wireless receiver comprising: a system bus disposed on the common die; an analog portion coupled to the system bus and comprising a radio frequency (RF) receiver circuit configured to receive an analog signal from the antenna and to provide a digital representation of the analog signal therefrom; an acquisition module configured to communicate with the RF receiver circuit via the system bus and to thereby receive the digital representation of the analog signal, wherein the acquisition module is further configured to process the digital representation to thereby extract data from the analog signal; a processor coupled to the system bus, wherein the processor is configured to control the RF receiver and the acquisition module, and to process the data from the acquisition module to thereby provide an output of the wireless receiver.

Claim 19

Dependent Claim 146 words

A wireless receiver provided on a common die in communication with an antenna, the wireless receiver comprising: a system bus disposed on the common die; an analog portion coupled to the system bus and comprising a radio frequency (RF) receiver circuit configured to receive an analog signal from the antenna and to provide a digital representation of the analog signal therefrom; an acquisition module configured to communicate with the RF receiver circuit via the system bus and to thereby receive the digital representation of the analog signal, wherein the acquisition module is further configured to process the digital representation to thereby extract data from the analog signal; a processor coupled to the system bus, wherein the processor is configured to control the RF receiver and the acquisition module, and to process the data from the acquisition module to thereby provide an output of the wireless receiver.

Claim 20

Dependent Claim 18 words

The wireless receiver of claim 16 further comprising an interface module coupling the processor to the system bus.

Claim 21

Dependent Claim 25 words

The wireless receiver of claim 17 wherein the interface module comprises a bus controller, a clock generator and an external interface for the wireless receiver.

Claim 22

Dependent Claim 25 words

The wireless receiver of claim 18 wherein the clock generator is operable to produce a system clock signal to the processor and the acquisition module.

Claim 23

Dependent Claim 40 words

The wireless receiver of claim 16 further comprising an interrupt controller disposed on the common die and coupled to the data bus, wherein the interrupt controller is operable to provide interrupt requests received via the system bus to the processor.

Claim 24

Dependent Claim 23 words

The wireless receiver of claim 16 further comprising an interface from the system bus to an external memory stacked with the common die.

Claim 25

Dependent Claim 40 words

The wireless receiver of claim 16 further comprising a boot module comprising a sequence of logic gates in communication with the system bus and operable to provide a boot sequence implemented in the sequence of logic gates to the processor.

Claim 26

Dependent Claim 50 words

The wireless receiver of claim 16 further comprising an automatic level control (ALC) module coupling the analog portion to the system bus, wherein the ALC module is configured to providing blanking and level control to the RF receiver in response to signals received from the processor via the system bus.

Claim 27

Dependent Claim 32 words

The wireless receiver of claim 16 further comprising clock generating circuitry configured to produce a system clock signal for the processor and the acquisition module as a function of an external reference.

Claim 28

Dependent Claim 38 words

The wireless receiver of claim 16 further comprising clock generating circuitry configured to produce a system clock signal for the processor and the acquisition module as a function of a selected one of a plurality of external references.

Claim 29

Dependent Claim 18 words

The GPS receiver of claim 16 further comprising a memory in a stacked configuration with the common die.

Claim 30

Dependent Claim 19 words

The wireless receiver of claim 26 further comprising a second memory in the stacked configuration with the common die.

Claim 31

Dependent Claim 18 words

The wireless receiver of claim 16 further comprising a filter in a stacked configuration with the common die.

Claim 32

Dependent Claim 149 words

A monolithic die for a wireless receiver stacked with a memory and electrically coupled to an antenna, the monolithic die comprising: a system bus disposed on the die; an analog portion coupled to the system bus and comprising a radio frequency (RF) receiver circuit configured to receive an analog signal from the antenna and to provide a digital representation of the analog signal therefrom; an acquisition module configured to communicate with the RF receiver circuit via the system bus and to thereby receive the digital representation of the analog signal, wherein the acquisition module is further configured to process the digital representation to thereby extract data from the analog signal; a processor coupled to the system bus, wherein the processor is configured to control the RF receiver and the acquisition module, and to process the data from the acquisition module to thereby provide an output of the wireless receiver.

Claim 33

Dependent Claim 149 words

A monolithic die for a wireless receiver stacked with a memory and electrically coupled to an antenna, the monolithic die comprising: a system bus disposed on the die; an analog portion coupled to the system bus and comprising a radio frequency (RF) receiver circuit configured to receive an analog signal from the antenna and to provide a digital representation of the analog signal therefrom; an acquisition module configured to communicate with the RF receiver circuit via the system bus and to thereby receive the digital representation of the analog signal, wherein the acquisition module is further configured to process the digital representation to thereby extract data from the analog signal; a processor coupled to the system bus, wherein the processor is configured to control the RF receiver and the acquisition module, and to process the data from the acquisition module to thereby provide an output of the wireless receiver.

Claim 34

Dependent Claim 67 words

A monolithic wireless device contained within a package, the device comprising: a substrate disposed within the package; a mixed-mode integrated circuit coupled to the substrate and having a digital portion and an analog portion on a common die; and a memory stacked with the mixed-mode integrated circuit within the package, wherein the memory is in electronic communication with the mixed-mode integrated circuit to implement the wireless device.

Claim 35

Dependent Claim 67 words

A monolithic wireless device contained within a package, the device comprising: a substrate disposed within the package; a mixed-mode integrated circuit coupled to the substrate and having a digital portion and an analog portion on a common die; and a memory stacked with the mixed-mode integrated circuit within the package, wherein the memory is in electronic communication with the mixed-mode integrated circuit to implement the wireless device.

Claim 36

Dependent Claim 18 words

The wireless device of claim 30 wherein the memory is direct bonded to the mixed mode integrated circuit.

Claim 37

Dependent Claim 25 words

The wireless device of claim 30 wherein the memory is electrically coupled to the mixed mode integrated circuit by package pins disposed on the substrate.

Claim 38

Dependent Claim 66 words

A monolithic wireless device contained within a package, the device comprising: means for receiving wireless signals; means for processing the wireless signals received at the receiving means, the processing means comprising a digital portion and an analog portion on a common die; and means for storing data and instructions for the processing means, wherein the storing means is stacked with the processing means within the package.

Claim 39

Dependent Claim 66 words

A monolithic wireless device contained within a package, the device comprising: means for receiving wireless signals; means for processing the wireless signals received at the receiving means, the processing means comprising a digital portion and an analog portion on a common die; and means for storing data and instructions for the processing means, wherein the storing means is stacked with the processing means within the package.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2008-10-03	2009-04-04	2009-10-04	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2012-10-03	2013-04-04	2013-10-04	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2016-10-03	2017-04-04	2017-10-04	$7700.00	Window Closed / Lapsed

Wireless receiver with stacked, single chip architecture

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