← Back to Patent Explorer
US5006486A Expired / Lapsed US ⏱️ 0.0 years remaining

Direct contact TAB method

Assignee: NXP USA Inc
•
Filing: 1990-01-29
•
Granted: 1991-04-09
•
Expires: 2010-01-29
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An external contact method and package wherein one embodiment includes a semiconductor die having a plurality of metallization layers including a top metallization layer that is covered by a passivating layer. At least a portion of the passivating layer is removed to expose at least a portion of the top metallization layer. Once the top metallization layer is exposed, external contact means are press-fit directly into the exposed portion. In a high powered ECL circuit, the present invention eliminates or greatly decreases voltage drop problems along the power bus lines which cause logic errors if the voltage drop is too large.

Inventors

  • 👤 Douglas W. Schucker

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 15:52
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/42; H10W72/00; H10W72/20; H10W72/29; H10W72/90; H10W72/921; H10W72/923; H10W72/9232; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 58 words
A method of connecting a TAB leadframe to the internal metallization of a semiconductor die comprising the steps of: providing a semiconductor die having at least one metallization layer; exposing at least a portion of said at least one metallization layer; and directly contacting said exposed portion of said at least one metallization layer with a TAB leadframe.
Claim 2
Independent Claim 58 words
A method of connecting a TAB leadframe to the internal metallization of a semiconductor die comprising the steps of: providing a semiconductor die having at least one metallization layer; exposing at least a portion of said at least one metallization layer; and directly contacting said exposed portion of said at least one metallization layer with a TAB leadframe.
Claim 3
Dependent Claim 28 words
The method of claim 1 wherein the providing step includes providing a semiconductor die having multiple metallization layers and the exposing step includes exposing the top metallization layer.
Claim 4
Dependent Claim 26 words
The method of claim 2 wherein the top metallization layer comprises a relatively compressible metal so that direct contact may be made thereto by TAB bonding.
Claim 5
Dependent Claim 17 words
The method of claim 3 wherein the top metallization layer includes a layer of gold disposed thereon.
Claim 6
Dependent Claim 34 words
The method of claim 4 wherein the semiconductor die includes an emitter coupled logic circuit and the top metallization layer is a power bus layer that couples external power sources to internal logic elements.
Claim 7
Independent Claim 74 words
A method of making external contact to a semiconductor die comprising the steps of: providing a semiconductor die having a plurality of metallization layers including a top metallization layer, said top metallization layer being covered by a passivating layer; removing at least a portion of said passivating layer to expose at least a portion of said top metallization layer; and press-fitting external contact means directly into said exposed portion of said top metallization layer.
Claim 8
Independent Claim 74 words
A method of making external contact to a semiconductor die comprising the steps of: providing a semiconductor die having a plurality of metallization layers including a top metallization layer, said top metallization layer being covered by a passivating layer; removing at least a portion of said passivating layer to expose at least a portion of said top metallization layer; and press-fitting external contact means directly into said exposed portion of said top metallization layer.
Claim 9
Dependent Claim 26 words
The method of claim 6 wherein the top metallization layer comprises a relatively compressible metal so that direct contact may be made thereto by TAB bonding.
Claim 10
Dependent Claim 17 words
The method of claim 7 wherein the top metallization layer includes a layer of gold disposed thereon.
Claim 11
Dependent Claim 34 words
The method of claim 6 wherein the semiconductor die includes an emitter coupled logic circuit and the top metallization layer is a power bus layer that couples external power sources to internal logic elements.
Claim 12
Dependent Claim 13 words
The method of claim 6 wherein external contact means comprise a lead frame.

References Cited (Backward Citations)

US4539472A Cited
US4903113A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-04-08 1994-10-08 1995-04-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-04-08 1998-10-08 1999-04-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-04-08 2002-10-08 2003-04-09 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag