US5917362A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Switching circuit
Assignee: Sony Semiconductor Solutions Corp
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Filing: 1998-01-21
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Granted: 1999-06-29
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Expires: 2018-01-21
Abstract
Abstract Switches are provided on the input and output side of an amplification stage in a signal switching circuit provided in a signal transmission line, and another signal is provided so that a signal can be transmitted directly. Further, a switching circuit is formed from FET elements, which are controlled to be switched on/off by control signals to assure a high isolation.
Inventors
- 👤 Kazumasa Kohama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 20:33
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/693; H03K17/6871; H03K2217/00; H03K2217/0054
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
240 words
A signal processing unit comprising: signal switching means including a first input terminal group including one or more input terminals, a first output terminal group including one or more output terminals in a one-to-one correspondence with each of the input terminals of said first input terminal group, a second input terminal group including one or more input terminals, a second output terminal group including one or more output terminals in a one-to-one correspondence with each of the input terminals of said second input terminal group, a first switch for selectively connecting one or more of the input terminals of said first input terminal group and one of the output terminals of said first output terminal group, a second switch for selectively connecting one of the input terminals of said first input terminal group and one of the output terminals of said second output terminal group, and a third switch for selectively connecting one of the input terminals of said second input terminal group and one of the output terminals of said first output terminal group; signal path control means for controlling on/off-states of said first, second and third switches; and two or more signal paths, at least a first signal path having an amplifier such that the signal paths have different gains from each other, to connect one of the output terminals of said second output terminal group and one of the input terminals of said second input terminal group.
Claim 2
Dependent Claim
240 words
A signal processing unit comprising: signal switching means including a first input terminal group including one or more input terminals, a first output terminal group including one or more output terminals in a one-to-one correspondence with each of the input terminals of said first input terminal group, a second input terminal group including one or more input terminals, a second output terminal group including one or more output terminals in a one-to-one correspondence with each of the input terminals of said second input terminal group, a first switch for selectively connecting one or more of the input terminals of said first input terminal group and one of the output terminals of said first output terminal group, a second switch for selectively connecting one of the input terminals of said first input terminal group and one of the output terminals of said second output terminal group, and a third switch for selectively connecting one of the input terminals of said second input terminal group and one of the output terminals of said first output terminal group; signal path control means for controlling on/off-states of said first, second and third switches; and two or more signal paths, at least a first signal path having an amplifier such that the signal paths have different gains from each other, to connect one of the output terminals of said second output terminal group and one of the input terminals of said second input terminal group.
Claim 3
Dependent Claim
19 words
The signal processing circuit according to claim 1, wherein said first, second and third switches are field effect transistors.
Claim 4
Dependent Claim
22 words
The signal processing circuit according to claim 2, wherein said first, second and third switches are formed on a single semiconductor substrate.
Claim 5
Dependent Claim
40 words
The signal processing circuit according to claim 1, wherein the signal switching means, the signal path control means, and the signal paths are used to adjust a gain in a transmission circuit that transmits a signal of a high frequency.
Claim 6
Dependent Claim
40 words
The signal processing circuit according to claim 1, wherein the signal switching means, the signal path control means, and the signal paths are used to adjust a gain in a reception circuit that receives a signal of a high frequency.
Claim 7
Dependent Claim
26 words
The switching circuit according to claim 1, further comprising an attenuator disposed in at least a second signal path of said two or more signal paths.
Claim 8
Dependent Claim
150 words
A switching circuit formed as an IC, comprising: first, second and third input/output terminals; a first signal route including two or more switching elements connected in series between said first and second input/output terminals; a second signal route including two or more switching elements connected in series between said first and third input/output terminals; a first grounded switching element connected from a junction in between said switching elements of said first signal route to a common ground on the IC; a second grounded switching element connected from said second input/output terminals to to an outside ground located outside the IC; a third grounded switching element connected from a junction in between said switching elements of said second signal route to said second signal route and the common ground; and a fourth grounded switching element connected between from said third input/output terminals to said third input/output terminal and the outside ground.
Claim 9
Dependent Claim
150 words
A switching circuit formed as an IC, comprising: first, second and third input/output terminals; a first signal route including two or more switching elements connected in series between said first and second input/output terminals; a second signal route including two or more switching elements connected in series between said first and third input/output terminals; a first grounded switching element connected from a junction in between said switching elements of said first signal route to a common ground on the IC; a second grounded switching element connected from said second input/output terminals to to an outside ground located outside the IC; a third grounded switching element connected from a junction in between said switching elements of said second signal route to said second signal route and the common ground; and a fourth grounded switching element connected between from said third input/output terminals to said third input/output terminal and the outside ground.
Claim 10
Dependent Claim
35 words
The switching circuit according to claim 7, wherein the switching elements in said first and second signal routes and said first, second, third and fourth grounded switching elements are field effect transistors of gallium arsenite.
Claim 11
Dependent Claim
34 words
The switching circuit according to claim 8, wherein the switching elements in said first and second signal paths and said first, second, third and fourth grounded switching elements are junction type field effect transistors.
Claim 12
Dependent Claim
23 words
The switching circuit according to claim 7, further comprising resistors inserted between said second and fourth grounded switching elements and the outside ground.
Claim 13
Dependent Claim
31 words
The switching circuit according to claim 8, further comprising capacitors inserted between said first, second, third and fourth grounded switching elements and one of the common ground and the outside ground.
References Cited (Backward Citations)
US5504745A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-06-28 | 2002-12-28 | 2003-06-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-06-28 | 2006-12-28 | 2007-06-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-06-28 | 2010-12-28 | 2011-06-29 | $7700.00 | Window Closed / Lapsed |