Memory reduction method for a DSP-based GPS processor

Claim 2

A GPS receiver data storage apparatus comprising: a first switch, said first switch receiving a digital GPS data; a first memory capable of storing at least two milliseconds of said digital GPS data; a second memory capable of storing at least two milliseconds of said digital GPS data in parallel with said first memory, with said first memory and said second memory being selectable by said first switch for filling with said digital GPS data; and a second switch selectable between said first memory and said second memory for extracting said digital GPS data therefrom; wherein GPS signal processing extracts digital GPS data from said first memory while said second memory is being filled and extracts digital GPS data from said second memory while said first memory is being filled, and stacks said at least two milliseconds of digital GPS data from one of said first and second memory into a one millisecond sample.

Claim 3

The apparatus of claim 1 , wherein said first memory and said second memory allow said digital GPS data to be processed in real time.

Claim 4

The apparatus of claim 1 , wherein said first switch is further connected to a source of said digital GPS data.

Claim 5

The apparatus of claim 1 , wherein said second switch is further connected to a downstream digital signal processing device.

Claim 6

The apparatus of claim 1 , wherein a first memory size and a second memory size are dependent on a throughput of a downstream digital signal processor.

Claim 7

The apparatus of claim 1 , wherein a first memory size and a second memory size are dependent on a throughput of a downstream coherent integrator device.

Claim 8

The apparatus of claim 1 , wherein a downstream digital signal processor speed is inversely related to a first memory size and a second memory size.

Claim 9

A GPS receiver apparatus, comprising: a first switch, said first switch receiving a digital GPS data; a first memory; a second memory in parallel with said first memory, with said first memory and said second memory being selectable by said first switch for filling with said digital GPS data; a second switch selectable between said first memory and said second memory for extracting said digital GPS data therefrom; a mixer connected to said second switch and further connected to a numerically controlled oscillator with said numerically controlled oscillator being provided with a predetermined Doppler characteristic, said mixer being capable of removing said predetermined Doppler characteristic from said digital GPS data; a stack RAM connected to said mixer, said stack RAM being capable of accumulating a predetermined time interval of said digital GPS data from said mixer; a correlator connected to said stack RAM, said correlator also receiving a predetermined Gold code, with said correlator being capable of correlating said predetermined Gold code against said digital GPS data; a magnitude squaring block connected to said correlator, said magnitude squaring block squaring the correlation output to produce a squared integration output; and a non-coherent integrator connected to said magnitude squaring block and capable of integrating said squared integration output to provide a pseudorange and Doppler characteristic output; wherein GPS signal processing extracts digital GPS data from said first memory while said second memory is being filled and extracts digital GPS data from said second memory while said first memory is being filled, and wherein said first memory and said second memory allow said digital GPS data to be processed in real time; wherein said numerically controlled oscillator is capable of being provided with a Doppler characteristic for a selected visible GPS satellite and said correlator is capable of being provided with a corresponding Gold code for said selected visible GPS satellite to enable said apparatus to process a digital GPS data for said selected visible GPS satellite.

Claim 10

A GPS receiver apparatus, comprising: a first switch, said first switch receiving a digital GPS data; a first memory; a second memory in parallel with said first memory, with said first memory and said second memory being selectable by said first switch for filling with said digital GPS data; a second switch selectable between said first memory and said second memory for extracting said digital GPS data therefrom; a mixer connected to said second switch and further connected to a numerically controlled oscillator with said numerically controlled oscillator being provided with a predetermined Doppler characteristic, said mixer being capable of removing said predetermined Doppler characteristic from said digital GPS data; a stack RAM connected to said mixer, said stack RAM being capable of accumulating a predetermined time interval of said digital GPS data from said mixer; a correlator connected to said stack RAM, said correlator also receiving a predetermined Gold code, with said correlator being capable of correlating said predetermined Gold code against said digital GPS data; a magnitude squaring block connected to said correlator, said magnitude squaring block squaring the correlation output to produce a squared integration output; and a non-coherent integrator connected to said magnitude squaring block and capable of integrating said squared integration output to provide a pseudorange and Doppler characteristic output; wherein GPS signal processing extracts digital GPS data from said first memory while said second memory is being filled and extracts digital GPS data from said second memory while said first memory is being filled, and wherein said first memory and said second memory allow said digital GPS data to be processed in real time; wherein said numerically controlled oscillator is capable of being provided with a Doppler characteristic for a selected visible GPS satellite and said correlator is capable of being provided with a corresponding Gold code for said selected visible GPS satellite to enable said apparatus to process a digital GPS data for said selected visible GPS satellite.

Claim 11

The apparatus of claim 8 , wherein said correlator is a Fast Fourier-Transform correlator.

Claim 12

The apparatus of claim 8 , wherein said unique predetermined Doppler characteristic is an estimate.

Claim 13

The apparatus of claim 8 , wherein said first switch is further connected to a source of said digital GPS data.

Claim 14

The apparatus of claim 8 , wherein a first memory size and a second memory size are dependent on a throughput of a downstream digital signal processor.

Claim 15

The apparatus of claim 8 , wherein a first memory size and a second memory size are dependent on a throughput of a downstream coherent integrator device.

Claim 16

The apparatus of claim 8 , wherein a downstream digital signal processor speed is inversely related to a first memory size and a second memory size.

Claim 17

The apparatus of claim 8 , wherein said mixer receives a predetermined Doppler signature for each visible GPS satellite.

Claim 18

The apparatus of claim 8 , wherein said stack RAM is a dual port stack RAM.

Claim 19

The apparatus of claim 8 , wherein a throughput rate of said digital signal processor is inversely proportional to the digital GPS data storage capacity of said first memory and said second memory.

Claim 20

The apparatus of claim 8 , further including a local DSP results RAM capable of storing a plurality of digital GPS data for said each visible GPS satellite.

Claim 23

The method of claim 19 , wherein said storing is performed by a first switch capable of alternately storing said digital GPS data to said first memory and to said second memory.

Claim 24

The method of claim 19 , wherein said extracting is performed by a second switch capable of alternately extracting a stored digital GPS data segment from said first memory and from said second memory.

Claim 27

The method of claim 22 , wherein said storing is performed by a first switch capable of alternately storing said digital GPS data to said first memory and to said second memory.

Claim 28

The method of claim 22 , wherein said extracting is performed by a second switch capable of alternately extracting a stored digital GPS data segment from said first memory and from said second memory.

Claim 29

The method of claim 22 , wherein said predetermined Doppler signature is received from a base station.

Claim 30

The method of claim 22 , wherein said correlating is performed by a plurality of parallel FFT correlators.

Claim 31

The method of claim 22 , wherein said correlating is performed by eight parallel FFT correlators.

Claim 32

The method of claim 22 , wherein said integrating is performed by a plurality of parallel non-coherent integrators.

Claim 33

The method of claim 22 , wherein said integrating is performed by eight parallel non-coherent integrators.