Stacked flip chip package

Claim 1

A stacked flip-chip package comprising: a substrate having a top surface, a bottom surface and an opening; a back-to-face chip module including a first chip and a second chip, wherein the first chip has a first active surface, a first back surface, and a plurality of first bonding pads, the second chip has a second active surface, a second back surface, and a plurality of second bonding pads, a plurality of redistributed traces are formed on the first back surface of the first chip and have a plurality of first bumping pads and a plurality of second bumping pads, the first bumping pads are formed at the periphery of the first back surface of the first chip in fan-out arrangement, the second bumping pads are formed on the center of the first back surface of the first chip in fan-in arrangement, the second chip is flip-chip mounted on the first back surface of the first chip so that the second bonding pads are electrically connected to the second bumping pads, the back-to-face chi module is attached to the top surface of the substrate in a manner that the first bumping pads are electrically connected to the top surface of the substrate and the second chip is accommodated inside the opening; and an encapsulant formed on the top surface of the substrate to encapsulate the back-to-face chip module.