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US6686223B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Method for fabricating multi-chip package semiconductor device

Assignee: Lapis Semiconductor Co Ltd
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Filing: 2003-04-14
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Granted: 2004-02-03
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Expires: 2023-04-14
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Abstract

Abstract A semiconductor device includes a substrate ( 101 ); a first semiconductor chip ( 102 ) mounted on the substrate; and a first insulating layer ( 105 ) which is provided on the first semiconductor chip. The device further includes a metal layer ( 102 ) which is provided on the first insulating layer; a second insulating layer ( 117 ) which is provided on the metal layer; and a second semiconductor chip ( 104 ) which is provided on the second insulating layer.

Inventors

  • 👤 Yasufumi Uchida

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 11:27
CPC Classifications
H; H10; H10W; H10W42/00; H10W42/20; H10W70/00; H10W70/01; H10W70/05; H10W70/60; H10W70/611; H10W90/00; H10W90/401; H10W70/67; H10W70/68; H10W70/682; H10W72/00; H10W72/01; H10W72/30; H10W72/381; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/851; H10W72/853; H10W72/865; H10W72/874; H10W72/877; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W72/941; H10W72/9415; H10W74/00; H10W90/20; H10W90/22; H10W90/231; H10W90/291; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/732; H10W90/734; H10W90/736; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 136 words
A method for fabricating a multi-chip package semiconductor device having a substrate, a first semiconductor chip mounted on the substrate, a first insulating layer which is provided on the first semiconductor chip, a metal layer which is provided on the first insulating layer, a second insulating layer which is provided on the metal layer, and second semiconductor chip which is provided on the second insulating layer, the method comprising the steps of: providing a semiconductor wafer in which a plurality of the second semiconductor chips are formed; providing a metal plate; providing insulating layers on the both surfaces of the metal plate; adhering the semiconductor wafer onto one surface of the metal plate with the insulating layer; and cutting the semiconductor wafer with the metal plate to obtain individual second semiconductor chips with the metal layers.
Claim 2
Independent Claim 136 words
A method for fabricating a multi-chip package semiconductor device having a substrate, a first semiconductor chip mounted on the substrate, a first insulating layer which is provided on the first semiconductor chip, a metal layer which is provided on the first insulating layer, a second insulating layer which is provided on the metal layer, and second semiconductor chip which is provided on the second insulating layer, the method comprising the steps of: providing a semiconductor wafer in which a plurality of the second semiconductor chips are formed; providing a metal plate; providing insulating layers on the both surfaces of the metal plate; adhering the semiconductor wafer onto one surface of the metal plate with the insulating layer; and cutting the semiconductor wafer with the metal plate to obtain individual second semiconductor chips with the metal layers.

References Cited (Backward Citations)

US5471369A Cited
US5767528A Cited
US6031284A Cited
US6291267B1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2007-02-02 2007-08-04 2008-02-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2011-02-02 2011-08-04 2012-02-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2015-02-02 2015-08-04 2016-02-03 $7700.00 Window Closed / Lapsed

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