US6743681B2
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Methods of Fabricating Gate and Storage Dielectric Stacks having Silicon-Rich-Nitride
Assignee: Micron Technology Inc
•
Filing: 2001-11-09
•
Granted: 2004-06-01
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Expires: 2021-11-09
Abstract
Abstract Gate and storage dielectric systems and methods of their fabrication are presented. A passivated overlayer deposited between a layer of dielectric material and a gate or first storage plate maintains a high K (dielectric constant) value of the dielectric material. The high K dielectric material forms an improved interface with a substrate or second plate. This improves dielectric system reliability and uniformity and permits greater scalability, dielectric interface compatibility, structural stability, charge control, and stoichiometric reproducibility. Furthermore, etch selectivity, low leakage current, uniform dielectric breakdown, and improved high temperature chemical passivity also result.
Inventors
- 👤 Arup Bhattacharyya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:10
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/68; H10D64/681; H10D64/685; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10B12/038; H10D1/00; H10D1/01; H10D1/045; H10D1/047; H10D1/60; H10D1/68; H10D1/682; H10D30/00; H10D30/60; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/0134; H10D64/01342; H10D64/01344; H10D64/0135; H10D64/031; H10D64/037; H10D64/691; H10D64/693; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6304; H10P14/6314; H10P14/6319; H10P14/65; H10P14/6516; H10P14/6548; H10P14/69; H10P14/692; H10P14/6938; H10P14/6939; H10P14/69391; H10P70/00; H10P70/10; H10P70/12; H10P70/125; H10B12/30; H10B12/31; H10B12/312
Claims Analysis
Total Claims: 42
Claim 1
Independent Claim
106 words
A method of fabricating a gate dielectric stack for a field effect transistor, said method comprising: removing native Si x O y H z from a region of a substrate; depositing on said region a layer of metal that forms a high K dielectric material when oxidized; oxidizing said layer to form said high K dielectric material; depositing on said layer a passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles; depositing a gate on said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles; and depositing a gate electrode on said gate; wherein said K is a dielectric constant.
Claim 2
Independent Claim
106 words
A method of fabricating a gate dielectric stack for a field effect transistor, said method comprising: removing native Si x O y H z from a region of a substrate; depositing on said region a layer of metal that forms a high K dielectric material when oxidized; oxidizing said layer to form said high K dielectric material; depositing on said layer a passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles; depositing a gate on said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles; and depositing a gate electrode on said gate; wherein said K is a dielectric constant.
Claim 3
Dependent Claim
13 words
The method of claim 1 further comprising doping said high K dielectric material.
Claim 4
Dependent Claim
29 words
The method of claim 2 wherein said doping comprises doping said high K dielectric material with a material selected from the group consisting of silicon and a transition metal.
Claim 5
Dependent Claim
22 words
The method of claim 3 wherein said transition metal is selected from the group consisting of zirconium, tungsten, hafnium, titanium, and tantalum.
Claim 6
Dependent Claim
20 words
The method of claim 1 further comprising annealing said gate dielectric stack by rapid thermal annealing to stabilize said stack.
Claim 7
Dependent Claim
21 words
The method of claim 5 wherein said annealing said gate dielectric stack is performed immediately following said depositing a passivated overlayer.
Claim 8
Dependent Claim
18 words
The method of claim 5 wherein said annealing said gate dielectric stack is performed immediately following said oxidizing.
Claim 9
Dependent Claim
52 words
The method of claim 1 wherein said removing native Si x O y H z comprises: inserting said substrate into a vacuum chamber; controllably introducing hydrofluoric acid vapor in an ultra pure nitrogen bleed-in; and maintaining a vacuum in said vacuum chamber of less than about 10 −6 torr during said introducing.
Claim 10
Dependent Claim
38 words
The method of claim 1 wherein said depositing a layer of metal comprises depositing a layer of metal by a process selected from the group consisting of atomic layer deposition, molecular beam epitaxy, electron beam evaporation, and sputtering.
Claim 11
Dependent Claim
18 words
The method of claim 1 wherein said depositing a layer of metal comprises depositing a layer of aluminum.
Claim 12
Dependent Claim
27 words
The method of claim 1 wherein said depositing a layer of metal comprises depositing a layer of aluminum having a thickness of less than about 3 nm.
Claim 13
Dependent Claim
62 words
The method of claim 1 wherein said depositing a passivated overlayer comprises depositing a passivated overlayer of silicon-rich-nitride by a low pressure plasma enhanced chemical vapor deposition with SiH 4 or SiH 2 Cl 2 , NH 3 , and nitrogen such that the ratio of SiH 4 or SiH 2 Cl 2 to NH 3 is no less than about 15.
Claim 14
Dependent Claim
25 words
The method of claim 1 wherein said depositing a passivated overlayer comprises depositing an overlayer of silicon-rich-nitride having a refractive index greater than about 2.5.
Claim 15
Dependent Claim
30 words
The method of claim 1 wherein said depositing a passivated overlayer comprises depositing an overlayer of silicon-rich-nitride having a thickness in the range of about 0.5 to about 3 nm.
Claim 16
Independent Claim
102 words
A method of fabricating a storage dielectric stack for an integrated circuit device, said method comprising: removing native Si x O y H z from a region of a first plate; depositing on said region a layer of metal that forms a high K dielectric material when oxidized; oxidizing said layer to form said high K dielectric material; depositing a on said layer a passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles; and depositing a second plate on said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles; wherein said K is a dielectric constant.
Claim 17
Independent Claim
102 words
A method of fabricating a storage dielectric stack for an integrated circuit device, said method comprising: removing native Si x O y H z from a region of a first plate; depositing on said region a layer of metal that forms a high K dielectric material when oxidized; oxidizing said layer to form said high K dielectric material; depositing a on said layer a passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles; and depositing a second plate on said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles; wherein said K is a dielectric constant.
Claim 18
Dependent Claim
13 words
The method of claim 15 further comprising doping said high K dielectric material.
Claim 19
Dependent Claim
28 words
The method of claim 16 wherein said doping comprises doping said high K dielectric material with a material selected from the group consisting of silicon and transition metal.
Claim 20
Dependent Claim
22 words
The method of claim 17 wherein said transition metal is selected from the group consisting of zirconium, tungsten, hafnium, titanium, and tantalum.
Claim 21
Dependent Claim
20 words
The method of claim 15 further comprising annealing said storage dielectric stack by rapid thermal annealing to stabilize said stack.
Claim 22
Dependent Claim
21 words
The method of claim 19 wherein said annealing said gate dielectric stack is performed immediately following said depositing a passivated overlayer.
Claim 23
Dependent Claim
18 words
The method of claim 19 wherein said annealing said gate dielectric stack is performed immediately following said oxidizing.
Claim 24
Dependent Claim
53 words
The method of claim 15 wherein said removing native Si x O y H z comprises: inserting said first plate into a vacuum chamber; controllably introducing hydrofluoric acid vapor in an ultra pure nitrogen bleed-in; and maintaining a vacuum in said vacuum chamber of less than about 10 −6 torr during said introducing.
Claim 25
Dependent Claim
38 words
The method of claim 15 wherein said depositing a layer of metal comprises depositing a layer of metal by a process selected from the group consisting of atomic layer deposition, molecular beam epitaxy, electron beam evaporation, and sputtering.
Claim 26
Dependent Claim
18 words
The method of claim 15 wherein said depositing a layer of metal comprises depositing a layer of aluminum.
Claim 27
Dependent Claim
27 words
The method of claim 15 wherein said depositing a layer of metal comprises depositing a layer of aluminum having a thickness of less than about 3 nm.
Claim 28
Dependent Claim
62 words
The method of claim 15 wherein said depositing a passivated overlayer comprises depositing a passivated overlayer of silicon-rich-nitride by a low pressure plasma enhanced chemical vapor deposition with SiH 4 or SiH 2 Cl 2 , NH 3 , and nitrogen such that the ratio of SiH 4 or SiH 2 Cl 2 to NH 3 is no less than about 15.
Claim 29
Dependent Claim
26 words
The method of claim 15 wherein said depositing a passivated overlayer comprises depositing an overlayer of silicon-rich-nitride having a refractive index not less than about 2.5.
Claim 30
Dependent Claim
30 words
The method of claim 15 wherein said depositing a passivated overlayer comprises depositing an overlayer of silicon-rich-nitride having a thickness in the range of about 0.5 to about 3 nm.
Claim 31
Independent Claim
199 words
A method of fabricating a gate dielectric stack for a field effect transistor, said method comprising: removing native Si x O y H z from a region of a substrate; depositing a layer of aluminum having a thickness of less than about 3 nm on said region; oxidizing said layer of aluminum to form a layer of alumina; depositing on said layer of alumina a passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles by a low pressure plasma enhanced chemical vapor deposition process, said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles having a thickness of about 0.5 to about 3 nm, said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles having a refractive index no less than about 2.5, said low pressure chemical vapor deposition process using SiH 4 or SiH 2 Cl 2 , NH 3 , and nitrogen such that the ratio of SiH 4 or SiH 2 Cl 2 to NH 3 is no less than about 15; depositing a gate on said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles; and depositing a gate electrode on said gate.
Claim 32
Independent Claim
199 words
A method of fabricating a gate dielectric stack for a field effect transistor, said method comprising: removing native Si x O y H z from a region of a substrate; depositing a layer of aluminum having a thickness of less than about 3 nm on said region; oxidizing said layer of aluminum to form a layer of alumina; depositing on said layer of alumina a passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles by a low pressure plasma enhanced chemical vapor deposition process, said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles having a thickness of about 0.5 to about 3 nm, said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles having a refractive index no less than about 2.5, said low pressure chemical vapor deposition process using SiH 4 or SiH 2 Cl 2 , NH 3 , and nitrogen such that the ratio of SiH 4 or SiH 2 Cl 2 to NH 3 is no less than about 15; depositing a gate on said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles; and depositing a gate electrode on said gate.
Claim 33
Dependent Claim
20 words
The method of claim 29 further comprising annealing said gate dielectric stack by rapid thermal annealing to stabilize said stack.
Claim 34
Dependent Claim
21 words
The method of claim 30 wherein said annealing said gate dielectric stack is performed immediately following said depositing a passivated overlayer.
Claim 35
Dependent Claim
18 words
The method of claim 30 wherein said annealing said gate dielectric stack is performed immediately following said oxidizing.
Claim 36
Dependent Claim
52 words
The method of claim 29 wherein said removing native Si x O y H z comprises: inserting said substrate into a vacuum chamber; controllably introducing hydrofluoric acid vapor in an ultra pure nitrogen bleed-in; and maintaining a vacuum in said vacuum chamber of less than about 10 −6 torr during said introducing.
Claim 37
Independent Claim
194 words
A method of fabricating a storage dielectric stack for an integrated circuit device, said method comprising: removing native Si x O y H z from a region of a first plate; depositing a layer of aluminum having a thickness of less than about 3 nm on said region; oxidizing said layer of aluminum to form a layer of alumina; depositing on said layer of alumina a passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles by a low pressure plasma enhanced chemical vapor deposition process, said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles having a thickness of about 0.5 to about 3 nm, said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles having a refractive index no less than about 2.5, said low pressure chemical vapor deposition process using SiH 4 or SiH 2 Cl 2 , NH 3 , and nitrogen such that the ratio of SiH 4 or SiH 2 Cl 2 to NH 3 is no less than about 15; and depositing a second plate on said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles.
Claim 38
Independent Claim
194 words
A method of fabricating a storage dielectric stack for an integrated circuit device, said method comprising: removing native Si x O y H z from a region of a first plate; depositing a layer of aluminum having a thickness of less than about 3 nm on said region; oxidizing said layer of aluminum to form a layer of alumina; depositing on said layer of alumina a passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles by a low pressure plasma enhanced chemical vapor deposition process, said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles having a thickness of about 0.5 to about 3 nm, said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles having a refractive index no less than about 2.5, said low pressure chemical vapor deposition process using SiH 4 or SiH 2 Cl 2 , NH 3 , and nitrogen such that the ratio of SiH 4 or SiH 2 Cl 2 to NH 3 is no less than about 15; and depositing a second plate on said passivated overlayer of silicon-rich-nitride comprising Si 3 N 4 and silicon particles.
Claim 39
Dependent Claim
20 words
The method of claim 34 further comprising annealing said storage dielectric stack by rapid thermal annealing to stabilize the stack.
Claim 40
Dependent Claim
21 words
The method of claim 35 wherein said annealing said gate dielectric stack is performed immediately following said depositing a passivated overlayer.
Claim 41
Dependent Claim
18 words
The method of claim 35 wherein said annealing said gate dielectric stack is performed immediately following said oxidizing.
Claim 42
Dependent Claim
53 words
The method of claim 34 wherein said removing native Si x O y H z comprises: inserting said first plate into a vacuum chamber; controllably introducing hydrofluoric acid vapor in an ultra pure nitrogen bleed-in; and maintaining a vacuum in said vacuum chamber of less than about 10 −6 torr during said introducing.
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