Patent US6521945B2 successfully refreshed from Google Patents.
US6521945B2
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US
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Method and composite for decreasing charge leakage
Assignee: Micron Technology Inc
•
Filing: 2002-01-30
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Granted: 2003-02-18
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Expires: 2022-01-30
Abstract
Abstract A dielectric insulating composite for insulating a floating gate from a control gate in a non-volatile memory is described. A material, such as an undoped polysilicon, amorphous silicon, or amorphous polysilicon or a silicon rich nitride, is inserted in the gate structure. The oxide film that results from the oxidation of these films is relatively free from impurities. As a result, charge leakage between the floating gate and control gate is reduced.
Inventors
- 👤 Michael Nuttall
- 👤 Garry A. Mercaldi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:28
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/68; H10D64/681; H10D30/00; H10D30/60; H10D30/68; H10D30/6891; H10D64/01; H10D64/031; H10D64/035; Y; Y10; Y10S; Y10S438/00; Y10S438/954
Claims Analysis
Total Claims: 182
Claim 1
Independent Claim
75 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 2
Dependent Claim
75 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 3
Dependent Claim
29 words
The composite of claim 1 , wherein the layer of silicon dioxide is formed by chemical vapor deposition and the second layer of silicon dioxide is formed by oxidation.
Claim 4
Dependent Claim
14 words
The composite of claim 1 , wherein the layer of undoped polysilicon is thin.
Claim 5
Dependent Claim
76 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 6
Dependent Claim
76 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 7
Dependent Claim
29 words
The composite of claim 4 , wherein the layer of silicon dioxide is formed by chemical vapor deposition and the second layer of silicon dioxide is formed by oxidation.
Claim 8
Dependent Claim
14 words
The composite of claim 4 , wherein the layer of undoped polysilicon is thin.
Claim 9
Dependent Claim
76 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of silicon dioxide formed on the floating gate; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 10
Dependent Claim
76 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of silicon dioxide formed on the floating gate; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 11
Dependent Claim
41 words
The composite of claim 7 , wherein the layer of silicon dioxide formed on the floating gate is formed by oxidation and the second layer of silicon dioxide formed on the layer of silicon nitride is formed by chemical vapor deposition.
Claim 12
Dependent Claim
15 words
The composite of claim 7 , wherein the layer of silicon rich nitride is thin.
Claim 13
Dependent Claim
89 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 14
Dependent Claim
89 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 15
Dependent Claim
25 words
The composite of claim 10 , wherein the layer of silicon dioxide and the second layer of silicon dioxide are formed by chemical vapor deposition.
Claim 16
Dependent Claim
21 words
The composite of claim 10 , wherein the layer of undoped polysilicon and the layer of silicon rich nitride are thin.
Claim 17
Dependent Claim
90 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 18
Dependent Claim
90 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 19
Dependent Claim
25 words
The composite of claim 13 , wherein the layer of silicon dioxide and the second layer of silicon dioxide are formed by chemical vapor deposition.
Claim 20
Dependent Claim
21 words
The composite of claim 13 , wherein the layer of undoped polysilicon and the layer of silicon rich nitride are thin.
Claim 21
Dependent Claim
95 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 22
Dependent Claim
95 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 23
Dependent Claim
15 words
The nonvolatile memory cell of claim 16 , wherein the insulator is a tunnel oxide.
Claim 24
Dependent Claim
21 words
The nonvolatile memory cell of claim 16 , wherein the layer of undoped polysilicon formed on the floating gate is thin.
Claim 25
Dependent Claim
96 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of silicon dioxide formed on the floating gate; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 26
Dependent Claim
96 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of silicon dioxide formed on the floating gate; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 27
Dependent Claim
15 words
The nonvolatile memory cell of claim 19 , wherein the insulator is a tunnel oxide.
Claim 28
Dependent Claim
24 words
The nonvolatile memory cell of claim 19 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 29
Dependent Claim
108 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 30
Dependent Claim
108 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 31
Dependent Claim
15 words
The nonvolatile memory cell of claim 22 , wherein the insulator is a tunnel oxide.
Claim 32
Dependent Claim
21 words
The nonvolatile memory cell of claim 22 , wherein the layer of undoped polysilicon formed on the floating gate is thin.
Claim 33
Dependent Claim
24 words
The nonvolatile memory cell of claim 22 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 34
Dependent Claim
37 words
The nonvolatile memory cell of claim 22 , wherein the layer of undoped polysilicon formed on the floating gate is thin and the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 35
Dependent Claim
147 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 36
Dependent Claim
147 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 37
Dependent Claim
14 words
The memory device of claim 27 , wherein the insulator is a tunnel oxide.
Claim 38
Dependent Claim
20 words
The memory device of claim 27 , wherein the layer of undoped polysilicon formed on the floating gate is thin.
Claim 39
Dependent Claim
148 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of silicon dioxide formed on the floating gate; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 40
Dependent Claim
148 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of silicon dioxide formed on the floating gate; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 41
Dependent Claim
14 words
The memory device of claim 30 , wherein the insulator is a tunnel oxide.
Claim 42
Dependent Claim
23 words
The memory device of claim 30 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 43
Dependent Claim
160 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 44
Dependent Claim
160 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 45
Dependent Claim
14 words
The memory device of claim 33 , wherein the insulator is a tunnel oxide.
Claim 46
Dependent Claim
20 words
The memory device of claim 33 , wherein the layer of undoped polysilicon formed on the floating gate is thin.
Claim 47
Dependent Claim
23 words
The memory device of claim 33 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 48
Dependent Claim
36 words
The memory device of claim 33 , wherein the layer of undoped polysilicon formed on the floating gate is thin and the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 49
Independent Claim
160 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 50
Independent Claim
160 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 51
Dependent Claim
13 words
The system of claim 38 , wherein the insulator is a tunnel oxide.
Claim 52
Dependent Claim
19 words
The system of claim 38 , wherein the layer of undoped polysilicon formed on the floating gate is thin.
Claim 53
Independent Claim
161 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of silicon dioxide formed on the floating gate; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 54
Independent Claim
161 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of silicon dioxide formed on the floating gate; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 55
Dependent Claim
13 words
The system of claim 41 , wherein the insulator is a tunnel oxide.
Claim 56
Dependent Claim
22 words
The system of claim 41 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 57
Independent Claim
173 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 58
Independent Claim
173 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of undoped polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of undoped polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 59
Dependent Claim
13 words
The system of claim 44 , wherein the insulator is a tunnel oxide.
Claim 60
Dependent Claim
19 words
The system of claim 44 , wherein the layer of undoped polysilicon formed on the floating gate is thin.
Claim 61
Dependent Claim
22 words
The system of claim 44 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 62
Dependent Claim
35 words
The system of claim 44 , wherein the layer of undoped polysilicon formed on the floating gate is thin and the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 63
Dependent Claim
56 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate and having an inter-layer insulator that is relatively free of impurities; and a control gate formed on the composite.
Claim 64
Dependent Claim
56 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate and having an inter-layer insulator that is relatively free of impurities; and a control gate formed on the composite.
Claim 65
Dependent Claim
18 words
The non-volatile memory cell of claim 49 , wherein the inter-layer insulator is a layer of silicon dioxide.
Claim 66
Dependent Claim
25 words
The non-volatile memory cell of claim 49 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of undoped polysilicon.
Claim 67
Dependent Claim
25 words
The non-volatile memory cell of claim 49 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of amorphous silicon.
Claim 68
Dependent Claim
25 words
The non-volatile memory cell of claim 49 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of amorphous polysilicon.
Claim 69
Dependent Claim
26 words
The non-volatile memory cell of claim 49 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of silicon rich nitride.
Claim 70
Dependent Claim
46 words
A memory device, comprising: a nonvolatile memory cell having an inter-layer insulator that is relatively free of impurities; an addressing circuit coupled to the memory cell for accessing the memory cell; and a read circuit coupled to the memory cell for reading from the memory cell.
Claim 71
Dependent Claim
46 words
A memory device, comprising: a nonvolatile memory cell having an inter-layer insulator that is relatively free of impurities; an addressing circuit coupled to the memory cell for accessing the memory cell; and a read circuit coupled to the memory cell for reading from the memory cell.
Claim 72
Dependent Claim
17 words
The memory device of claim 55 , wherein the inter-layer insulator is a layer of silicon dioxide.
Claim 73
Dependent Claim
24 words
The memory device of claim 55 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of undoped polysilicon.
Claim 74
Dependent Claim
24 words
The memory device of claim 55 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of amorphous silicon.
Claim 75
Dependent Claim
24 words
The memory device of claim 55 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of amorphous polysilicon.
Claim 76
Dependent Claim
25 words
The memory device of claim 55 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of silicon rich nitride.
Claim 77
Independent Claim
59 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a nonvolatile memory cell having an inter-layer insulator that is relatively free of impurities; an addressing circuit coupled to the memory cell for accessing the memory cell; and a read circuit coupled to the memory cell for reading from the memory cell.
Claim 78
Independent Claim
59 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a nonvolatile memory cell having an inter-layer insulator that is relatively free of impurities; an addressing circuit coupled to the memory cell for accessing the memory cell; and a read circuit coupled to the memory cell for reading from the memory cell.
Claim 79
Dependent Claim
17 words
The memory device of claim 61 , wherein the inter-layer insulator is a layer of silicon dioxide.
Claim 80
Dependent Claim
24 words
The memory device of claim 61 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of undoped polysilicon.
Claim 81
Dependent Claim
24 words
The memory device of claim 61 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of amorphous silicon.
Claim 82
Dependent Claim
24 words
The memory device of claim 61 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of amorphous polysilicon.
Claim 83
Dependent Claim
25 words
The memory device of claim 61 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of silicon rich nitride.
Claim 84
Dependent Claim
54 words
A transistor comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate and having an inter-layer insulator that is relatively free of impurities; and a control gate formed on the composite.
Claim 85
Dependent Claim
54 words
A transistor comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate and having an inter-layer insulator that is relatively free of impurities; and a control gate formed on the composite.
Claim 86
Dependent Claim
16 words
The transistor of claim 67 , wherein the inter-layer insulator is a layer of silicon dioxide.
Claim 87
Dependent Claim
23 words
The transistor of claim 67 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of undoped polysilicon.
Claim 88
Dependent Claim
23 words
The transistor of claim 67 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of amorphous silicon.
Claim 89
Dependent Claim
23 words
The transistor of claim 67 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of amorphous polysilicon.
Claim 90
Dependent Claim
24 words
The transistor of claim 67 , wherein the inter-layer insulator is a layer of silicon dioxide formed on a layer of silicon rich nitride.
Claim 91
Dependent Claim
75 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 92
Dependent Claim
75 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 93
Dependent Claim
29 words
The composite of claim 73 , wherein the layer of silicon dioxide is formed by chemical vapor deposition and the second layer of silicon dioxide is formed by oxidation.
Claim 94
Dependent Claim
14 words
The composite of claim 73 , wherein the layer of amorphous silicon is thin.
Claim 95
Dependent Claim
76 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 96
Dependent Claim
76 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 97
Dependent Claim
29 words
The composite of claim 76 , wherein the layer of silicon dioxide is formed by chemical vapor deposition and the second layer of silicon dioxide is formed by oxidation.
Claim 98
Dependent Claim
14 words
The composite of claim 76 , wherein the layer of amorphous silicon is thin.
Claim 99
Dependent Claim
89 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 100
Dependent Claim
89 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 101
Dependent Claim
25 words
The composite of claim 79 , wherein the layer of silicon dioxide and the second layer of silicon dioxide are formed by chemical vapor deposition.
Claim 102
Dependent Claim
21 words
The composite of claim 79 , wherein the layer of amorphous silicon and the layer of silicon rich nitride are thin.
Claim 103
Dependent Claim
90 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 104
Dependent Claim
90 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 105
Dependent Claim
25 words
The composite of claim 82 , wherein the layer of silicon dioxide and the second layer of silicon dioxide are formed by chemical vapor deposition.
Claim 106
Dependent Claim
21 words
The composite of claim 82 , wherein the layer of amorphous silicon and the layer of silicon rich nitride are thin.
Claim 107
Dependent Claim
95 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 108
Dependent Claim
95 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 109
Dependent Claim
15 words
The nonvolatile memory cell of claim 85 , wherein the insulator is a tunnel oxide.
Claim 110
Dependent Claim
21 words
The nonvolatile memory cell of claim 85 , wherein the layer of amorphous silicon formed on the floating gate is thin.
Claim 111
Dependent Claim
108 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 112
Dependent Claim
108 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 113
Dependent Claim
15 words
The nonvolatile memory cell of claim 88 , wherein the insulator is a tunnel oxide.
Claim 114
Dependent Claim
21 words
The nonvolatile memory cell of claim 88 , wherein the layer of amorphous silicon formed on the floating gate is thin.
Claim 115
Dependent Claim
24 words
The nonvolatile memory cell of claim 88 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 116
Dependent Claim
37 words
The nonvolatile memory cell of claim 88 , wherein the layer of amorphous silicon formed on the floating gate is thin and the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 117
Dependent Claim
147 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 118
Dependent Claim
147 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 119
Dependent Claim
14 words
The memory device of claim 93 , wherein the insulator is a tunnel oxide.
Claim 120
Dependent Claim
20 words
The memory device of claim 93 , wherein the layer of amorphous silicon formed on the floating gate is thin.
Claim 121
Dependent Claim
160 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 122
Dependent Claim
160 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 123
Dependent Claim
14 words
The memory device of claim 96 , wherein the insulator is a tunnel oxide.
Claim 124
Dependent Claim
20 words
The memory device of claim 96 , wherein the layer of amorphous silicon formed on the floating gate is thin.
Claim 125
Dependent Claim
23 words
The memory device of claim 96 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 126
Dependent Claim
36 words
The memory device of claim 96 , wherein the layer of amorphous silicon formed on the floating gate is thin and the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 127
Independent Claim
160 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coup led to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 128
Independent Claim
160 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coup led to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 129
Dependent Claim
13 words
The system of claim 101 , wherein the insulator is a tunnel oxide.
Claim 130
Dependent Claim
19 words
The system of claim 101 , wherein the layer of amorphous silicon formed on the floating gate is thin.
Claim 131
Independent Claim
174 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride form ed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 132
Independent Claim
174 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous silicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous silicon; a layer of silicon nitride form ed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 133
Dependent Claim
13 words
The system of claim 104 , wherein the insulator is a tunnel oxide.
Claim 134
Dependent Claim
19 words
The system of claim 104 , wherein the layer of amorphous silicon formed on the floating gate is thin.
Claim 135
Dependent Claim
22 words
The system of claim 104 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 136
Dependent Claim
35 words
The system of claim 104 , wherein the layer of amorphous silicon formed on the floating gate is thin and the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 137
Dependent Claim
75 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 138
Dependent Claim
75 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 139
Dependent Claim
29 words
The composite of claim 109 , wherein the layer of silicon dioxide is formed by chemical vapor deposition and the second layer of silicon dioxide is formed by oxidation.
Claim 140
Dependent Claim
14 words
The composite of claim 109 , wherein the layer of amorphous polysilicon is thin.
Claim 141
Dependent Claim
76 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 142
Dependent Claim
76 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the layer of silicon nitride, the control gate formed on the second layer of silicon dioxide.
Claim 143
Dependent Claim
29 words
The composite of claim 112 , wherein the layer of silicon dioxide is formed by chemical vapor deposition and the second layer of silicon dioxide is formed by oxidation.
Claim 144
Dependent Claim
14 words
The composite of claim 112 , wherein the layer of amorphous polysilicon is thin.
Claim 145
Dependent Claim
89 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 146
Dependent Claim
89 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed by oxidizing the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 147
Dependent Claim
25 words
The composite of claim 115 , wherein the layer of silicon dioxide and the second layer of silicon dioxide are formed by chemical vapor deposition.
Claim 148
Dependent Claim
21 words
The composite of claim 115 , wherein the layer of amorphous polysilicon and the layer of silicon rich nitride are thin.
Claim 149
Dependent Claim
90 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 150
Dependent Claim
90 words
A dielectric composite for insulating a floating gate from a control gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed by partially oxidizing the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the layer of silicon rich nitride, the control gate formed on the second layer of silicon dioxide.
Claim 151
Dependent Claim
25 words
The composite of claim 118 , wherein the layer of silicon dioxide and the second layer of silicon dioxide are formed by chemical vapor deposition.
Claim 152
Dependent Claim
21 words
The composite of claim 118 , wherein the layer of amorphous polysilicon and the layer of silicon rich nitride are thin.
Claim 153
Dependent Claim
95 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 154
Dependent Claim
95 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 155
Dependent Claim
15 words
The nonvolatile memory cell of claim 121 , wherein the insulator is a tunnel oxide.
Claim 156
Dependent Claim
21 words
The nonvolatile memory cell of claim 121 , wherein the layer of amorphous polysilicon formed on the floating gate is thin.
Claim 157
Dependent Claim
108 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 158
Dependent Claim
108 words
A nonvolatile memory cell comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite.
Claim 159
Dependent Claim
15 words
The nonvolatile memory cell of claim 124 , wherein the insulator is a tunnel oxide.
Claim 160
Dependent Claim
21 words
The nonvolatile memory cell of claim 124 , wherein the layer of amorphous polysilicon formed on the floating gate is thin.
Claim 161
Dependent Claim
24 words
The nonvolatile memory cell of claim 124 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 162
Dependent Claim
37 words
The nonvolatile memory cell of claim 124 , wherein the layer of amorphous polysilicon formed on the floating gate is thin and the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 163
Dependent Claim
147 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 164
Dependent Claim
147 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 165
Dependent Claim
14 words
The memory device of claim 129 , wherein the insulator is a tunnel oxide.
Claim 166
Dependent Claim
20 words
The memory device of claim 129 , wherein the layer of amorphous polysilicon formed on the floating gate is thin.
Claim 167
Dependent Claim
160 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 168
Dependent Claim
160 words
A memory device, comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 169
Dependent Claim
14 words
The memory device of claim 132 , wherein the insulator is a tunnel oxide.
Claim 170
Dependent Claim
20 words
The memory device of claim 132 , wherein the layer of amorphous polysilicon formed on the floating gate is thin.
Claim 171
Dependent Claim
23 words
The memory device of claim 132 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 172
Dependent Claim
36 words
The memory device of claim 132 , wherein the layer of amorphous polysilicon formed on the floating gate is thin and the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 173
Independent Claim
160 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 174
Independent Claim
160 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 175
Dependent Claim
13 words
The system of claim 137 , wherein the insulator is a tunnel oxide.
Claim 176
Dependent Claim
19 words
The system of claim 137 , wherein the layer of amorphous polysilicon formed on the floating gate is thin.
Claim 177
Independent Claim
173 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 178
Independent Claim
173 words
A system comprising: a processor; and a memory device coupled to the processor, the memory device comprising: a plurality of memory cells, at least one of the memory cells comprising: a substrate; a source and drain formed on the substrate; an insulator formed on the source and drain; a floating gate formed on the insulator; a composite formed on the floating gate, the composite comprising: a layer of amorphous polysilicon formed on the floating gate; a layer of silicon dioxide formed on the layer of amorphous polysilicon; a layer of silicon nitride formed on the layer of silicon dioxide; a layer of silicon rich nitride formed on the layer of silicon nitride; and a second layer of silicon dioxide formed on the silicon rich nitride; and a control gate formed on the composite; addressing circuity coupled to the plurality of memory cells for accessing at least one of the memory cells; and a read circuit coupled to the plurality of memory cells for reading data from at least one of the memory cells.
Claim 179
Dependent Claim
13 words
The system of claim 140 , wherein the insulator is a tunnel oxide.
Claim 180
Dependent Claim
19 words
The system of claim 140 , wherein the layer of amorphous polysilicon formed on the floating gate is thin.
Claim 181
Dependent Claim
22 words
The system of claim 140 , wherein the layer of silicon rich nitride formed on the layer of silicon nitride is thin.
Claim 182
Dependent Claim
32 words
The system of claim 140 , wherein the layer of amorphous polysilicon formed on the floating gate is thin and the layer of silicon rich nitride formed on the layer of silicon
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-02-17 | 2006-08-19 | 2007-02-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-02-17 | 2010-08-19 | 2011-02-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-02-17 | 2014-08-19 | 2015-02-18 | $7700.00 | Window Closed / Lapsed |