Nonvolatile memory and manufacturing method thereof

Claim 2

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate; a first gate insulating film formed over said first semiconductor layer; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate; a second gate insulating film formed over said second semiconductor layer; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than that of said second semiconductor layer.

Claim 3

A semiconductor device according to claim 1 , wherein said first semiconductor layer and said second semiconductor layer have thicknesses of 1-50 nm and 40-100 nm, respectively.

Claim 4

A semiconductor device according to claim 1 , wherein said first semiconductor layer has a thickness of 10-40 nm.

Claim 5

A semiconductor device according to claim 1 , wherein said first semiconductor layer has a thickness so that impact ionization occurs more easily than said second semiconductor layer.

Claim 6

A semiconductor device according to claim 1 , said semiconductor device is selected from the group consisting of a video camera, a still camera, a head-mounted display, a car navigation apparatus, a personal computer, a portable information terminal, a mobile computer and a cellular telephone.

Claim 7

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate; a first gate insulating film formed over said first semiconductor layer; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate; a second gate insulating film formed over said second semiconductor layer; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than that of said second semiconductor layer, wherein said first and second semiconductor layers comprise crystalline silicon.

Claim 8

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate; a first gate insulating film formed over said first semiconductor layer; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate; a second gate insulating film formed over said second semiconductor layer; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than that of said second semiconductor layer, wherein said first and second semiconductor layers comprise crystalline silicon.

Claim 9

A semiconductor device according to claim 6 , wherein said first semiconductor layer and said second semiconductor layer have thicknesses of 1-50 nm and 40-100 nm, respectively.

Claim 10

A semiconductor device according to claim 6 , wherein said first semiconductor layer has a thickness of 10-40 nm.

Claim 11

A semiconductor device according to claim 6 , wherein said first semiconductor layer has a thickness so that impact ionization occurs more easily than said second semiconductor layer.

Claim 12

A semiconductor device according to claim 6 , said semiconductor device is selected from the group consisting of a video camera, a still camera, a head-mounted display, a car navigation apparatus, a personal computer, a portable information terminal, a mobile computer and a cellular telephone.

Claim 13

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate, said first semiconductor layer having first source and drain regions and a first channel region therebetween; a first gate insulating film formed over said first channel region; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate, said second semiconductor layer having second source and drain regions and a second channel region therebetween; a second gate insulating film formed over said second channel region; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than that of said second semiconductor layer.

Claim 14

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate, said first semiconductor layer having first source and drain regions and a first channel region therebetween; a first gate insulating film formed over said first channel region; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate, said second semiconductor layer having second source and drain regions and a second channel region therebetween; a second gate insulating film formed over said second channel region; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than that of said second semiconductor layer.

Claim 15

A semiconductor device according to claim 11 , wherein said first semiconductor layer and said second semiconductor layer have thicknesses of 1-50 nm and 40-100 nm, respectively.

Claim 16

A semiconductor device according to claim 11 , wherein said first semiconductor layer has a thickness of 10-40 nm.

Claim 17

A semiconductor device according to claim 11 , wherein said first semiconductor layer has a thickness so that impact ionization occurs more easily than said second semiconductor layer.

Claim 18

A semiconductor device according to claim 11 , said semiconductor device is selected from the group consisting of a video camera, a still camera, a head-mounted display, a car navigation apparatus, a personal computer, a portable information terminal, a mobile computer and a cellular telephone.

Claim 19

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate, said first semiconductor layer having first source and drain regions and a first channel region therebetween; a first gate insulating film formed over said first channel region; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate, said second semiconductor layer having second source and drain regions and a second channel region therebetween; a second gate insulating film formed over said second channel region; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than that of said second semiconductor layer, wherein an impurity region is formed between said channel region and at least one of said second source and drain regions.

Claim 20

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate, said first semiconductor layer having first source and drain regions and a first channel region therebetween; a first gate insulating film formed over said first channel region; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate, said second semiconductor layer having second source and drain regions and a second channel region therebetween; a second gate insulating film formed over said second channel region; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than that of said second semiconductor layer, wherein an impurity region is formed between said channel region and at least one of said second source and drain regions.

Claim 21

A semiconductor device according to claim 16 , wherein said first semiconductor layer and said second semiconductor layer have thicknesses of 1-50 nm and 40-100 nm, respectively.

Claim 22

A semiconductor device according to claim 16 , wherein said first semiconductor layer has a thickness of 10-40 mm.

Claim 23

A semiconductor device according to claim 16 , wherein said first semiconductor layer has a thickness so that impact ionization occurs more easily than said second semiconductor layer.

Claim 24

A semiconductor device according to claim 16 , said semiconductor device is selected from the group consisting of a video camera, a still camera, a head-mounted display, a car navigation apparatus, a personal computer, a portable information terminal, a mobile computer and a cellular telephone.

Claim 25

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate; a first gate insulating film formed over said first semiconductor layer; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate; a second gate insulating film formed over said second semiconductor layer; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than that of said second semiconductor layer, wherein subthreshold coefficient of said switching element is 60-100 mV/decade.

Claim 26

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate; a first gate insulating film formed over said first semiconductor layer; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate; a second gate insulating film formed over said second semiconductor layer; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than that of said second semiconductor layer, wherein subthreshold coefficient of said switching element is 60-100 mV/decade.

Claim 27

A semiconductor device according to claim 21 , wherein said first semiconductor layer and said second semiconductor layer have thicknesses of 1-50 nm and 40-100 nm, respectively.

Claim 28

A semiconductor device according to claim 21 , wherein said first semiconductor layer has a thickness of 10-40 nm.

Claim 29

A semiconductor device according to claim 21 , wherein said first semiconductor layer has a thickness so that impact ionization occurs more easily than said second semiconductor layer.

Claim 30

A semiconductor device according to claim 21 , said semiconductor device is selected from the group consisting of a video camera, a still camera, a head-mounted display, a car navigation apparatus, a personal computer, a portable information terminal, a mobile computer and a cellular telephone.

Claim 31

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate; a first gate insulating film formed over said first semiconductor layer; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate; a second gate insulating film formed over said second semiconductor layer; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than a thickness of said second semiconductor layer, and wherein a tunnel current flowing through said first semiconductor layer is two times or more larger than the tunnel current flowing through said second semiconductor layer.

Claim 32

A semiconductor device having at least one nonvolatile memory, said nonvolatile memory comprising: a plurality of memory cells arranged in a matrix form, each of said memory cells including a memory element and a switching element; said memory element comprising: a first semiconductor layer formed over a substrate; a first gate insulating film formed over said first semiconductor layer; a floating gate electrode formed over said first gate insulating film; an insulating film formed over said floating gate electrode; and a control gate electrode formed over said insulating film, said switching element comprising: a second semiconductor layer formed over said substrate; a second gate insulating film formed over said second semiconductor layer; and a gate electrode formed over said second gate insulating film, wherein a thickness of said first semiconductor layer is smaller than a thickness of said second semiconductor layer, and wherein a tunnel current flowing through said first semiconductor layer is two times or more larger than the tunnel current flowing through said second semiconductor layer.

Claim 33

A semiconductor device according to claim 26 , wherein said first semiconductor layer and said second semiconductor layer have thicknesses of 1-50 nm and 40-100 nm, respectively.

Claim 34

A semiconductor device according to claim 26 , wherein said first semiconductor layer has a thickness of 10-40 nm.

Claim 35

A semiconductor device according to claim 26 , wherein said first semiconductor layer has a thickness so that impact ionization occurs more easily than said second semiconductor layer.

Claim 36

A semiconductor device according to claim 26 , said semiconductor device is selected from the group consisting of a video camera, a still camera, a head-mounted display, a car navigation apparatus, a personal computer, a portable information terminal, a mobile computer and a cellular telephone.