Patent US6492685B1 successfully refreshed from Google Patents.
US6492685B1
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US
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Semiconductor device having a pair of N-channel TFT and P-channel TFT
Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 2000-09-20
•
Granted: 2002-12-10
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Expires: 2020-09-20
Abstract
Abstract The absolute value of the threshold voltage of a P-channel TFT is reduced by making its channel length shorter than that of an N-channel TFT by at least 20%, to thereby approximately equalize the threshold voltage absolute values of those TFTs.
Inventors
- 👤 Jun Koyama
- 👤 Yasuhiko Takemura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 06:11
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/40; H10D30/00; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6737; H10D30/6739; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/856; H10D86/421; H10D86/441; H10D86/60
Claims Analysis
Total Claims: 76
Claim 1
Independent Claim
114 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an inverter circuit formed in said driving circuit, said inverter circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, and wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor.
Claim 2
Dependent Claim
114 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an inverter circuit formed in said driving circuit, said inverter circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, and wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor.
Claim 3
Dependent Claim
19 words
A semiconductor device according to claim 1 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 4
Dependent Claim
18 words
A semiconductor device according to claim 1 , wherein said semiconductor device is an active matrix display device.
Claim 5
Dependent Claim
31 words
A semiconductor device according to claim 1 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0.4V or less.
Claim 6
Dependent Claim
32 words
A semiconductor device according to claim 1 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3-4 μm.
Claim 7
Dependent Claim
117 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an inverter circuit formed in said driving circuit, said inverter circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor by at least 20%.
Claim 8
Dependent Claim
117 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an inverter circuit formed in said driving circuit, said inverter circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor by at least 20%.
Claim 9
Dependent Claim
19 words
A semiconductor device according to claim 6 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 10
Dependent Claim
18 words
A semiconductor device according to claim 6 , wherein said semiconductor device is an active matrix display device.
Claim 11
Dependent Claim
31 words
A semiconductor device according to claim 6 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0.4V or less.
Claim 12
Dependent Claim
32 words
A semiconductor device according to claim 6 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3-4 μm.
Claim 13
Dependent Claim
146 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an inverter circuit formed in said driving circuit, said inverter circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, and wherein a width of said gate electrode of said P-channel thin film transistor in a direction along the source and drain regions is smaller than that of said N-channel thin film transistor.
Claim 14
Dependent Claim
146 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an inverter circuit formed in said driving circuit, said inverter circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, and wherein a width of said gate electrode of said P-channel thin film transistor in a direction along the source and drain regions is smaller than that of said N-channel thin film transistor.
Claim 15
Dependent Claim
19 words
A semiconductor device according to claim 11 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 16
Dependent Claim
18 words
A semiconductor device according to claim 11 , wherein said semiconductor device is an active matrix display device.
Claim 17
Dependent Claim
31 words
A semiconductor device according to claim 11 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistors is 0.4V or less.
Claim 18
Dependent Claim
32 words
A semiconductor device according to claim 11 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3-4 μm.
Claim 19
Dependent Claim
163 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an inverter circuit formed in said driving circuit, said inverter circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, wherein said semiconductor layer in said N-channel thin film transistor has at least one impurity region formed between said channel region and one of said source and drain regions, and wherein said impurity region contains an N-type impurity at a concentration lower than that in said source and drain regions.
Claim 20
Dependent Claim
163 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an inverter circuit formed in said driving circuit, said inverter circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, wherein said semiconductor layer in said N-channel thin film transistor has at least one impurity region formed between said channel region and one of said source and drain regions, and wherein said impurity region contains an N-type impurity at a concentration lower than that in said source and drain regions.
Claim 21
Dependent Claim
19 words
A semiconductor device according to claim 16 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 22
Dependent Claim
18 words
A semiconductor device according to claim 16 , wherein said semiconductor device is an active matrix display device.
Claim 23
Dependent Claim
31 words
A semiconductor device according to claim 16 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0.4V or less.
Claim 24
Dependent Claim
32 words
A semiconductor device according to claim 16 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3-4 μm.
Claim 25
Dependent Claim
116 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an analog switching circuit formed in said driving circuit, said analog switching circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, and wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor.
Claim 26
Dependent Claim
116 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an analog switching circuit formed in said driving circuit, said analog switching circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, and wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor.
Claim 27
Dependent Claim
19 words
A semiconductor device according to claim 21 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 28
Dependent Claim
18 words
A semiconductor device according to claim 21 , wherein said semiconductor device is an active matrix display device.
Claim 29
Dependent Claim
31 words
A semiconductor device according to claim 21 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0-4 or less.
Claim 30
Dependent Claim
32 words
A semiconductor device according to claim 21 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3-4 μm.
Claim 31
Dependent Claim
119 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an analog switching circuit formed in said driving circuit, said analog switching circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor by at least 20%.
Claim 32
Dependent Claim
119 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an analog switching circuit formed in said driving circuit, said analog switching circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor by at least 20%.
Claim 33
Dependent Claim
19 words
A semiconductor device according to claim 26 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 34
Dependent Claim
18 words
A semiconductor device according to claim 26 , wherein said semiconductor device is a active matrix display device.
Claim 35
Dependent Claim
31 words
A semiconductor device according to claim 26 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0.4V or less.
Claim 36
Dependent Claim
32 words
A semiconductor device according to claim 26 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3.4 μm.
Claim 37
Dependent Claim
148 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an analog switching circuit formed in said driving circuit, said analog switching circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, and wherein a width of said gate electrode of said P-channel thin film transistor in a direction along the source and drain regions is smaller than that of said N-channel thin film transistor.
Claim 38
Dependent Claim
148 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and an analog switching circuit formed in said driving circuit, said analog switching circuit having at least one pair of an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, and wherein a width of said gate electrode of said P-channel thin film transistor in a direction along the source and drain regions is smaller than that of said N-channel thin film transistor.
Claim 39
Dependent Claim
18 words
A semiconductor device according to claim 31 , wherein said semiconductor layer is crystalline semiconductor layer comprising silicon.
Claim 40
Dependent Claim
18 words
A semiconductor device according to claim 31 , wherein said semiconductor device is an active matrix display device.
Claim 41
Dependent Claim
31 words
A semiconductor device according to claim 31 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0.4V or less.
Claim 42
Dependent Claim
32 words
A semiconductor device according to claim 31 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that is said P-channel thin film transistor is 3-4 μm.
Claim 43
Dependent Claim
150 words
A semiconductor device comprising: an active matrix circuit formed over a substrate; and an analog switching circuit, said analog switching circuit having at least one pair of an N-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transisitors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, wherein said semiconductor layer in said N-channel thin film transisitor has at least one impurity region formed between said channel region and one of said source and drain regions, and wherein said impurity region contains an N-type impurity at a concentration lower than that in said source and drain regions.
Claim 44
Dependent Claim
150 words
A semiconductor device comprising: an active matrix circuit formed over a substrate; and an analog switching circuit, said analog switching circuit having at least one pair of an N-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transisitors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, wherein said semiconductor layer in said N-channel thin film transisitor has at least one impurity region formed between said channel region and one of said source and drain regions, and wherein said impurity region contains an N-type impurity at a concentration lower than that in said source and drain regions.
Claim 45
Dependent Claim
19 words
A semiconductor device according to claim 36 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 46
Dependent Claim
18 words
A semiconductor device according to claim 36 , wherein said semiconductor device is an active matrix display device.
Claim 47
Dependent Claim
31 words
A semiconductor device according to claim 36 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0.4V or less.
Claim 48
Dependent Claim
32 words
A semiconductor device according to claim 36 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3-4 μm.
Claim 49
Dependent Claim
30 words
A semiconductor device according to claim 21 , wherein at least one of said N-channel and P-channel thin film transistors has at least one offset region in said semiconductor layer.
Claim 50
Dependent Claim
30 words
A semiconductor device according to claim 26 , wherein at least one of said N-channel and P-channel thin film transistors has at least on offset region in said semiconductor layer.
Claim 51
Dependent Claim
30 words
A semiconductor device according to claim 31 , wherein at least one of said N-channel and P-channel thin film transistors has at least one offset region in said semiconductor layer.
Claim 52
Dependent Claim
30 words
A semiconductor device according to claim 36 , wherein at least one of said N-channel and P-channel thin film transistors has at least one offset region in said semiconductor layer.
Claim 53
Dependent Claim
111 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and at least one CMOS circuit formed in said driving circuit, said CMOS circuit comprising an N-channel thin film transisitor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transisitor comprisies a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, and wherein a channel length of said P-channel thin film transisitor is shorter than that of said N-channel thin film transisitor.
Claim 54
Dependent Claim
111 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and at least one CMOS circuit formed in said driving circuit, said CMOS circuit comprising an N-channel thin film transisitor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transisitor comprisies a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, and wherein a channel length of said P-channel thin film transisitor is shorter than that of said N-channel thin film transisitor.
Claim 55
Dependent Claim
19 words
A semiconductor device according to claim 45 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 56
Dependent Claim
18 words
A semiconductor device according to claim 45 , wherein said semiconductor device is an active matrix display device.
Claim 57
Dependent Claim
31 words
A semiconductor device according to claim 45 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0.4V or less.
Claim 58
Dependent Claim
31 words
A semiconductor device according to claim 45 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3-4μ.
Claim 59
Dependent Claim
114 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and at least one CMOS circuit formed in said driving circuit, said CMOS circuit comprising an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor by at least 20%.
Claim 60
Dependent Claim
114 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and at least one CMOS circuit formed in said driving circuit, said CMOS circuit comprising an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor by at least 20%.
Claim 61
Dependent Claim
19 words
A semiconductor device according to claim 50 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 62
Dependent Claim
18 words
A semiconductor device according to claim 50 , wherein said semiconductor device is an active matrix display device.
Claim 63
Dependent Claim
31 words
A semiconductor device according to claim 50 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0.4V or less.
Claim 64
Dependent Claim
32 words
A semiconductor device according to claim 50 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3-4 μm.
Claim 65
Dependent Claim
143 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and at least one CMOS circuit formed in said driving circuit, said CMOS circuit comprising an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, and wherein a width of said gate electrode of said P-channel thin film transistor in a direction along the source and drain regions is smaller than that of said N-channel thin film transistor.
Claim 66
Dependent Claim
143 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and at least one CMOS circuit formed in said driving circuit, said CMOS circuit comprising an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, and wherein a width of said gate electrode of said P-channel thin film transistor in a direction along the source and drain regions is smaller than that of said N-channel thin film transistor.
Claim 67
Dependent Claim
19 words
A semiconductor device according to claim 55 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 68
Dependent Claim
18 words
A semiconductor device according to claim 55 , wherein said semiconductor device is an active matrix display device.
Claim 69
Dependent Claim
31 words
A semiconductor device according to claim 55 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0.4V or less.
Claim 70
Dependent Claim
32 words
A semiconductor device according to claim 55 , wherein the channel length of said N-channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3-4 μm.
Claim 71
Dependent Claim
160 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and at least one CMOS circuit formed in said driving circuit, said CMOS circuit comprising an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, wherein said semiconductor layer in said N-channel thin film transistor has at least one impurity region formed between said channel region and one of said source and drain regions, and wherein said impurity region contains an N-type impurity at a concentration lower than that in said source and drain regions.
Claim 72
Dependent Claim
160 words
A semiconductor device comprising: an active matrix circuit and a driving circuit formed over a substrate; and at least one CMOS circuit formed in said driving circuit, said CMOS circuit comprising an N-channel thin film transistor and a P-channel thin film transistor electrically connected to said N-channel thin film transistor; wherein each of said N-channel and P-channel thin film transistors comprises a semiconductor layer having a channel region interposed between source and drain regions, and a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween, wherein a channel length of said P-channel thin film transistor is shorter than that of said N-channel thin film transistor, wherein said semiconductor layer in said N-channel thin film transistor has at least one impurity region formed between said channel region and one of said source and drain regions, and wherein said impurity region contains an N-type impurity at a concentration lower than that in said source and drain regions.
Claim 73
Dependent Claim
19 words
A semiconductor device according to claim 60 , wherein said semiconductor layer is a crystalline semiconductor layer comprising silicon.
Claim 74
Dependent Claim
18 words
A semiconductor device according to claim 60 , wherein said semiconductor device is an active matrix display device.
Claim 75
Dependent Claim
31 words
A semiconductor device according to claim 60 , wherein a difference in the absolute value of the threshold voltage between said N-channel and P-channel thin film transistor is 0.4V or less.
Claim 76
Dependent Claim
33 words
A semiconductor device according to claim 60 , wherein the channel length of said N-channel channel thin film transistor is 6-7 μm, and that of said P-channel thin film transistor is 3-4 μm.
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