Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
161 words
A static random access memory cell including two cross-coupled drive MOS transistors and two transfer MOS transistors connected to said drive MOS transistors, comprising: a semiconductor substrate of a first conductivity type; a plurality of gate electrodes of said drive MOS transistors and said transfer MOS transistors, formed over said semiconductor substrate; a plurality of first impurity diffusion regions of a second conductivity type opposite to said first conductivity type, formed within said semiconductor substrate, each of said first impurity regions forming one of drains and sources of said drive MOS transistors and said transfer MOS transistors; a plurality of pocket regions of said first conductivity type formed within said semiconductor substrate, each of said pocket regions being adjacent to substantially only the sides of the sources of said drive MOS transistors and immediately beneath the gate electrodes of said drive MOS transistors, and an impurity concentration of said pocket regions being larger than an impurity concentration of said semiconductor substrate.
Claim 2
Dependent Claim
161 words
A static random access memory cell including two cross-coupled drive MOS transistors and two transfer MOS transistors connected to said drive MOS transistors, comprising: a semiconductor substrate of a first conductivity type; a plurality of gate electrodes of said drive MOS transistors and said transfer MOS transistors, formed over said semiconductor substrate; a plurality of first impurity diffusion regions of a second conductivity type opposite to said first conductivity type, formed within said semiconductor substrate, each of said first impurity regions forming one of drains and sources of said drive MOS transistors and said transfer MOS transistors; a plurality of pocket regions of said first conductivity type formed within said semiconductor substrate, each of said pocket regions being adjacent to substantially only the sides of the sources of said drive MOS transistors and immediately beneath the gate electrodes of said drive MOS transistors, and an impurity concentration of said pocket regions being larger than an impurity concentration of said semiconductor substrate.
Claim 3
Dependent Claim
39 words
The static random access memory cell as set forth in claim 1 , wherein a length of said gate electrodes of said drive MOS transistors is smaller than a length of said gate electrodes of said transfer MOS transistors.
Claim 4
Dependent Claim
70 words
The static random access memory cell as set forth in claim 1 , further comprising a plurality of second impurity diffusion regions of said second conductivity type, formed with said semiconductor substrate and adjacent to the sources and drains of said drive MOS transistors and said transfer MOS transistors, an impurity concentration of said second impurity diffusion regions being smaller than an impurity concentration of said first impurity diffusion regions.
Claim 5
Dependent Claim
25 words
The static random access memory cell as set forth in claim 1 , further comprising two resistors connected as loads to said drive MOS transistors.
Claim 6
Dependent Claim
27 words
The static random access memory cell as set forth in claim 1 , further comprising two thin film transistors connected as loads to said drive MOS transistors.
Claim 7
Dependent Claim
18 words
The static random access memory cell as set forth in claim 1 , being of a non-load type.