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US5955746A Expired / Lapsed US ⏱️ 0.0 years remaining

SRAM having enhanced cell ratio

Assignee: MagnaChip Semiconductor Ltd
•
Filing: 1997-03-27
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Granted: 1999-09-21
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Expires: 2017-03-27
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Abstract

Abstract An SRAM cell and a method of manufacturing the same are disclosed. An SRAM cell including pull down devices, access devices and pull up devices each having source and drain regions with LDD structure, the source and drain regions of the access devices having: N + source and drain regions; N - source and drain regions formed under the N + source and drain regions; and P - impurity regions whose predetermined portion is overlapped with the N - source and drain region.

Inventors

  • 👤 Jae-Kap Kim

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 18:00
CPC Classifications
H; H10; H10B; H10B10/00; H10B10/12; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/017; H10D84/80; H10D84/82; H10D84/83; H10D84/85; Y; Y10; Y10S; Y10S257/00; Y10S257/903; Y10S257/904

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 59 words
An SRAM cell including pull down devices, access devices and pull up devices, wherein source and drain regions of said access device comprise: N+ source and drain regions; N- source and drain regions formed under said N+ source and drain regions; and a P- impurity region wherein predetermined portion thereof is overlapped with said N- source and drain regions.
Claim 2
Dependent Claim 59 words
An SRAM cell including pull down devices, access devices and pull up devices, wherein source and drain regions of said access device comprise: N+ source and drain regions; N- source and drain regions formed under said N+ source and drain regions; and a P- impurity region wherein predetermined portion thereof is overlapped with said N- source and drain regions.
Claim 3
Dependent Claim 48 words
The SRAM cell as claimed in claim 1, wherein a concentration of N type impurity of a region in which said P- impurity region and said N- source and drain regions of said access devices are overlapped is lower than that of said N- source and drain regions.
Claim 4
Dependent Claim 52 words
The SRAM cell as claimed in claim 2, wherein said concentration of N type impurity region of the overlapped portion of said access devices is 1×10 18 to 2×10 18 ions/cm 3 , and that of the N - source and drain regions is 2×10 18 to 5×10 18 ions/cm 3 .
Claim 5
Dependent Claim 18 words
The SRAM cell as claimed in claim 1, wherein said pull up devices are P channel bulk MOSFETs.
Claim 6
Dependent Claim 15 words
The SRAM cell as claimed in claim 1, wherein said pull up device are resistors.
Claim 7
Dependent Claim 18 words
The SRAM cell as claimed in claim 1, wherein said pull up device are P channel polysilicon TFTs.

References Cited (Backward Citations)

US4499652A Cited
JPS61241967A Cited
US5047818A Cited
JPH05121695A Cited
US5396098A Cited
US5324973A Cited
US5629546A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-09-20 2003-03-22 2003-09-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-09-20 2007-03-22 2007-09-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-09-20 2011-03-22 2011-09-21 $7700.00 Window Closed / Lapsed

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