US6358810B1
Expired / Lapsed
US
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Method for superior step coverage and interface control for high K dielectric capacitors and related electrodes
Assignee: Applied Materials Inc
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Filing: 1998-07-28
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Granted: 2002-03-19
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Expires: 2018-07-28
Abstract
Abstract The present invention provides a multi-layer semiconductor memory device comprising: a bottom electrode having a bottom layer, an upper interface layer and an intermediate tuning layer disposed between the bottom layer and the upper interface layer; a top electrode; and a high dielectric constant dielectric layer disposed between the bottom electrode and the top electrode. The present invention further provides an apparatus and a method for manufacturing high density DRAMs having capacitors having high quality HDC materials and low leakage currents. Another aspect of the present invention provides an electrode-dielectric interface that nucleates high quality HDC films. The present invention further provides an apparatus and a method for manufacturing capacitors within a high aspect ratio aperture.
Inventors
- 👤 Charles Dornfest
- 👤 John Egermeier
- 👤 Nitin Khurana
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 04:08
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D1/00; H10D1/60; H10D1/68; H10D1/682; H10D1/692
Claims Analysis
Total Claims: 41
Claim 1
Independent Claim
94 words
A method for forming a capacitor on a substrate, comprising: a) depositing a bottom layer over a conductor plug in the substrate; b) depositing a tuning layer over the bottom layer; c) depositing an interface layer over the tuning layer; d) re-sputtering the interface layer to conformally cover the tuning layer and the bottom layer; e) depositing a high k dielectric layer over the interface layer, wherein the high k dielectric layer has a thickness of about 80 angstroms to about 800 angstroms; and f) depositing an upper electrode layer over the dielectric layer.
Claim 2
Independent Claim
94 words
A method for forming a capacitor on a substrate, comprising: a) depositing a bottom layer over a conductor plug in the substrate; b) depositing a tuning layer over the bottom layer; c) depositing an interface layer over the tuning layer; d) re-sputtering the interface layer to conformally cover the tuning layer and the bottom layer; e) depositing a high k dielectric layer over the interface layer, wherein the high k dielectric layer has a thickness of about 80 angstroms to about 800 angstroms; and f) depositing an upper electrode layer over the dielectric layer.
Claim 3
Independent Claim
107 words
A method for forming a capacitor in a high aspect ratio feature, comprising: a) depositing a tuning layer in the feature by physical vapor deposition; b) distributing and redepositing the tuning layer by high density plasma physical vapor deposition; c) depositing an interface layer over the tuning layer by physical vapor deposition; d) distributing and redepositing the interface layer by high density plasma physical vapor deposition; e) depositing a high k dielectric layer over the interface layer, wherein the high k dielectric layer has a thickness of about 80 angstroms to about 800 angstroms; and f) depositing an upper electrode layer over the high k dielectric layer.
Claim 4
Independent Claim
107 words
A method for forming a capacitor in a high aspect ratio feature, comprising: a) depositing a tuning layer in the feature by physical vapor deposition; b) distributing and redepositing the tuning layer by high density plasma physical vapor deposition; c) depositing an interface layer over the tuning layer by physical vapor deposition; d) distributing and redepositing the interface layer by high density plasma physical vapor deposition; e) depositing a high k dielectric layer over the interface layer, wherein the high k dielectric layer has a thickness of about 80 angstroms to about 800 angstroms; and f) depositing an upper electrode layer over the high k dielectric layer.
Claim 5
Dependent Claim
37 words
The method of claim 2 wherein the tuning layer comprises a material selected from the group comprising ruthenium oxide, ruthenium combined with ruthenium oxide, iridium oxide, iridium combined with iridium oxide, titanium aluminum nitride and combinations thereof.
Claim 6
Dependent Claim
36 words
The method of claim 2 wherein the interface layer comprises a material selected from the group comprising platinum, ruthenium, iridium, rhodium, platinum combined with rhodium, platinum combined with iridium, platinum combined with ruthenium and combinations thereof.
Claim 7
Dependent Claim
21 words
The method of claim 2 , further comprising: g) depositing a barrier layer in the feature before depositing the tuning layer.
Claim 8
Dependent Claim
25 words
The method of claim 5 wherein the barrier layer comprises titanium, titanium nitride, titanium aluminum nitride, tantalum, tantalum nitride, tantalum aluminum nitride, and combinations thereof.
Claim 9
Dependent Claim
13 words
The method of claim 5 wherein the barrier layer is titanium aluminum nitride.
Claim 10
Dependent Claim
20 words
The method of claim 5 wherein the barrier layer has a thickness of about 50 angstroms to about 500 angstroms.
Claim 11
Dependent Claim
20 words
The method of claim 2 wherein the tuning layer has a thickness of about 50 angstroms to about 1,000 angstroms.
Claim 12
Dependent Claim
29 words
The method of claim 2 wherein the interface layer is a combination material comprising platinum combined with rhodium, platinum combined with iridium, platinum combined with ruthenium, and combinations thereof.
Claim 13
Dependent Claim
16 words
The method of claim 10 wherein the combination material comprises about 75% to about 90% platinum.
Claim 14
Dependent Claim
20 words
The method of claim 2 wherein the interface layer has a thickness of about 200 angstroms to about 4,000 angstroms.
Claim 15
Dependent Claim
29 words
The method of claim 2 wherein the high k dielectric layer comprises barium strontium titanate, lead zirconate titanate, lead lanthanium titanate, barium titanate, strontium titanate, and strontium bismuth titanate.
Claim 16
Dependent Claim
13 words
The method of claim 13 wherein the high k dielectric layer is doped.
Claim 17
Dependent Claim
22 words
The method of claim 2 wherein the high k dielectric layer has a thickness of about 200 angstroms to about 300 angstroms.
Claim 18
Dependent Claim
21 words
The method of claim 2 wherein the high k dielectric layer has a median grain thickness of less than 150 angstroms.
Claim 19
Dependent Claim
30 words
The method of claim 2 wherein the upper electrode layer comprises platinum, ruthenium, iridium, rhodium, platinum combined with rhodium, platinum combined with iridium, platinum combined with ruthenium, and combinations thereof.
Claim 20
Independent Claim
82 words
A method for forming a capacitor on a substrate, comprising: a) depositing a bottom layer over a conductor plug in the substrate; b) depositing a barrier layer over the bottom layer; c) depositing a tuning layer over the barrier layer; d) depositing an interface layer over the tuning layer, wherein the tuning layer controls the microstructure of the interface layer; e) depositing a high k dielectric layer over the interface layer; and f) depositing an upper electrode layer over the dielectric layer.
Claim 21
Independent Claim
82 words
A method for forming a capacitor on a substrate, comprising: a) depositing a bottom layer over a conductor plug in the substrate; b) depositing a barrier layer over the bottom layer; c) depositing a tuning layer over the barrier layer; d) depositing an interface layer over the tuning layer, wherein the tuning layer controls the microstructure of the interface layer; e) depositing a high k dielectric layer over the interface layer; and f) depositing an upper electrode layer over the dielectric layer.
Claim 22
Independent Claim
97 words
A method for forming a capacitor on a substrate, comprising: depositing a bottom layer over a conductor plug in the substrate; depositing a barrier layer on the bottom layer; depositing a tuning layer over the barrier layer by physical vapor deposition; depositing an interface layer over the tuning layer, wherein the tuning layer controls the microstructure of the interface layer; depositing a high k dielectric layer over the interface layer, wherein the high k dielectric layer has a thickness of about 80 angstroms to about 800 angstroms; and depositing an upper electrode layer over the dielectric layer.
Claim 23
Independent Claim
97 words
A method for forming a capacitor on a substrate, comprising: depositing a bottom layer over a conductor plug in the substrate; depositing a barrier layer on the bottom layer; depositing a tuning layer over the barrier layer by physical vapor deposition; depositing an interface layer over the tuning layer, wherein the tuning layer controls the microstructure of the interface layer; depositing a high k dielectric layer over the interface layer, wherein the high k dielectric layer has a thickness of about 80 angstroms to about 800 angstroms; and depositing an upper electrode layer over the dielectric layer.
Claim 24
Dependent Claim
31 words
The method of claim 19 , wherein the tuning layer comprises ruthenium oxide, ruthenium combined with ruthenium oxide, iridium oxide, iridium combined with iridium oxide, titanium aluminum nitride and combinations thereof.
Claim 25
Dependent Claim
18 words
The method of claim 19 , wherein the interface layer comprises platinum, ruthenium, iridium, rhodium, and combinations thereof.
Claim 26
Dependent Claim
26 words
The method of claim 19 , wherein the bottom layer comprises titanium, titanium nitride, titanium aluminum nitride, tantalum, tantalum nitride, tantalum aluminum nitride, and combinations thereof.
Claim 27
Dependent Claim
12 words
The method of claim 19 , wherein the bottom layer is titanium.
Claim 28
Dependent Claim
21 words
The method of claim 19 , wherein the bottom layer has a thickness of about 50 angstroms to about 500 angstroms.
Claim 29
Dependent Claim
26 words
The method of claim 19 , wherein the barrier layer comprises titanium, titanium nitride, titanium aluminum nitride, tantalum, tantalum nitride, tantalum aluminum nitride, and combinations thereof.
Claim 30
Dependent Claim
14 words
The method of claim 19 , wherein the barrier layer is titanium aluminum nitride.
Claim 31
Dependent Claim
21 words
The method of claim 19 , wherein the barrier layer has a thickness of about 50 angstroms to about 500 angstroms.
Claim 32
Dependent Claim
21 words
The method of claim 19 , wherein the tuning layer has a thickness of about 50 angstroms to about 1,000 angstroms.
Claim 33
Dependent Claim
30 words
The method of claim 19 , wherein the interface layer is a combination material comprising platinum combined with rhodium, platinum combined with iridium, platinum combined with ruthenium, and combinations thereof.
Claim 34
Dependent Claim
17 words
The method of claim 29 , wherein the combination material comprises about 75% to about 90% platinum.
Claim 35
Dependent Claim
21 words
The method of claim 19 , wherein the interface layer has a thickness of about 200 angstroms to about 4,000 angstroms.
Claim 36
Dependent Claim
30 words
The method of claim 19 , wherein the high k dielectric layer comprises barium strontium titanate, lead zirconate titanate, lead lanthanium titanate, barium titanate, strontium titanate, and strontium bismuth titanate.
Claim 37
Dependent Claim
14 words
The method of claim 32 , wherein the high k dielectric layer is doped.
Claim 38
Dependent Claim
23 words
The method of claim 19 , wherein the high k dielectric layer has a thickness of about 200 angstroms to about 300 angstroms.
Claim 39
Dependent Claim
31 words
The method of claim 19 , wherein the upper electrode layer comprises platinum, ruthenium, iridium, rhodium, platinum combined with rhodium, platinum combined with iridium, platinum combined with ruthenium, and combinations thereof.
Claim 40
Dependent Claim
22 words
The method of claim 19 , wherein the upper electrode layer has a thickness of about 200 angstroms to about 4,000 angstroms.
Claim 41
Dependent Claim
22 words
The method of claim 19 , wherein the high k dielectric layer has a median grain thickness of less than 150 angstroms.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-03-18 | 2005-09-17 | 2006-03-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-03-18 | 2009-09-17 | 2010-03-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-03-18 | 2013-09-17 | 2014-03-19 | $7700.00 | Window Closed / Lapsed |