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US6265230B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Methods to cure the effects of hydrogen annealing on ferroelectric capacitors

Assignee: University of Maryland, College Park
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Filing: 2000-01-20
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Granted: 2001-07-24
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Expires: 2020-01-20
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Abstract

Abstract A ferroelectric memory cell integrated with silicon circuitry which require a forming-gas anneal of the silicon circuitry after the ferroelectric stack has been formed. The ferroelectric layer may have a composition such that there is no space in the lattice of the ferroelectric phase to accommodate atomic hydrogen or have a composition with a Curie temperature below the temperature of the forming-gas anneal. Preferably, there is no upper platinum electrode, or it is deposited after the forming-gas anneal. A metal-oxide upper electrode serves as barrier to the forming-gas anneal, and an intermetallic layer positioned above the ferroelectric stack serves as an even better barrier. Forming-gas damage to the ferroelectric stack can be removed by a recovery anneal in a hydrogen-free environment, preferably performed at a temperature above the Curie temperature.

Inventors

  • 👤 Sanjeev Aggarwal
  • 👤 Scott Robert Perusse
  • 👤 Ramamoorthy Ramesh

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 04:25
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04Q11/0428; H04Q11/0478; H04L; H04L49/00; H04L49/30; H04L49/3081; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682; H10D1/692; H10D1/696; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L2012/5629; H04L2012/5631; H04L2012/5636

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 117 words
A process for treating a substrate comprising a ferroelectric memory cell including a ferroelectric stack having a ferroelectric layer formed over a lower electrode layer and integrated on a silicon integrated circuit in said substrate, comprising the steps of: after the formation of active circuits in said silicon integrated circuit and of oxide portions of said ferroelectric stack, a first step of annealing said substrate at an elevated first temperature in an environment containing hydrogen; and a subsequent second step of annealing said substrate at an elevated second temperature in a hydrogen-free environment, wherein said hydrogen-free environment is at essentially atmospheric pressure and comprises an oxygen content in the range of 1 to 100 ppm by volume.
Claim 2
Dependent Claim 117 words
A process for treating a substrate comprising a ferroelectric memory cell including a ferroelectric stack having a ferroelectric layer formed over a lower electrode layer and integrated on a silicon integrated circuit in said substrate, comprising the steps of: after the formation of active circuits in said silicon integrated circuit and of oxide portions of said ferroelectric stack, a first step of annealing said substrate at an elevated first temperature in an environment containing hydrogen; and a subsequent second step of annealing said substrate at an elevated second temperature in a hydrogen-free environment, wherein said hydrogen-free environment is at essentially atmospheric pressure and comprises an oxygen content in the range of 1 to 100 ppm by volume.
Claim 3
Dependent Claim 116 words
A process for treating a substrate comprising a ferroelectric memory cell including a ferroelectric stack having a ferroelectric layer formed over a lower electrode layer and integrated on a silicon integrated circuit in said substrate, comprising the steps of: after the formation of active circuits in said silicon integrated circuit and of oxide portions of said ferroelectric stack, a first step of annealing said substrate at an elevated first temperature in an environment containing hydrogen; and a subsequent second step of annealing said substrate at an elevated second temperature in a hydrogen-free environment, wherein said hydrogen-free environment comprises an oxygen content in the range of 1 to 100 ppm by volume when measured at atmospheric pressure.
Claim 4
Dependent Claim 116 words
A process for treating a substrate comprising a ferroelectric memory cell including a ferroelectric stack having a ferroelectric layer formed over a lower electrode layer and integrated on a silicon integrated circuit in said substrate, comprising the steps of: after the formation of active circuits in said silicon integrated circuit and of oxide portions of said ferroelectric stack, a first step of annealing said substrate at an elevated first temperature in an environment containing hydrogen; and a subsequent second step of annealing said substrate at an elevated second temperature in a hydrogen-free environment, wherein said hydrogen-free environment comprises an oxygen content in the range of 1 to 100 ppm by volume when measured at atmospheric pressure.
Claim 5
Dependent Claim 134 words
A process for treating a substrate comprising a ferroelectric memory cell including a ferroelectric stack having a ferroelectric layer formed over a lower electrode layer and integrated on a silicon integrated circuit in said substrate, comprising the steps of: after the formation of active circuits in said silicon integrated circuit and of oxide portions of said ferroelectric stack, a first step of annealing said substrate at an elevated first temperature in an environment containing hydrogen; and a subsequent second step of annealing said substrate at an elevated second temperature in a hydrogen-free environment, thereby recovering polarization characteristics of said ferroelectric memory cell degraded in said first annealing step, wherein said hydrogen-free environment comprises a chemically inert gas and oxygen having a concentration of between 1 to 100 ppm by volume to said inert gas.
Claim 6
Dependent Claim 134 words
A process for treating a substrate comprising a ferroelectric memory cell including a ferroelectric stack having a ferroelectric layer formed over a lower electrode layer and integrated on a silicon integrated circuit in said substrate, comprising the steps of: after the formation of active circuits in said silicon integrated circuit and of oxide portions of said ferroelectric stack, a first step of annealing said substrate at an elevated first temperature in an environment containing hydrogen; and a subsequent second step of annealing said substrate at an elevated second temperature in a hydrogen-free environment, thereby recovering polarization characteristics of said ferroelectric memory cell degraded in said first annealing step, wherein said hydrogen-free environment comprises a chemically inert gas and oxygen having a concentration of between 1 to 100 ppm by volume to said inert gas.
Claim 7
Dependent Claim 108 words
A process for treating a substrate comprising a ferroelectric memory cell including a ferroelectric stack having a ferroelectric layer formed over a lower electrode layer and integrated on a silicon integrated circuit in said substrate, comprising the steps of: after the formation of active circuits in said silicon integrated circuit and of oxide portions of said ferroelectric stack, a first step of annealing said substrate at an elevated first temperature in an environment containing hydrogen; and a subsequent second step of annealing said substrate at an elevated second temperature in a hydrogen-free environment, wherein said hydrogen-free environment comprises at least 90% by volume of a chemically inert gas.
Claim 8
Dependent Claim 108 words
A process for treating a substrate comprising a ferroelectric memory cell including a ferroelectric stack having a ferroelectric layer formed over a lower electrode layer and integrated on a silicon integrated circuit in said substrate, comprising the steps of: after the formation of active circuits in said silicon integrated circuit and of oxide portions of said ferroelectric stack, a first step of annealing said substrate at an elevated first temperature in an environment containing hydrogen; and a subsequent second step of annealing said substrate at an elevated second temperature in a hydrogen-free environment, wherein said hydrogen-free environment comprises at least 90% by volume of a chemically inert gas.
Claim 9
Dependent Claim 20 words
The process of claim 4 , wherein said hydrogen-free environment comprises no more than 100 ppm by volume of oxygen.
Claim 10
Dependent Claim 13 words
The process of claim 4 , wherein said chemically inert gas comprises argon.
Claim 11
Dependent Claim 19 words
The process of claim 4 , wherein said hydrogen-free environment comprises no more than 1% of hydrogen by volume.

References Cited (Backward Citations)

US3599060A Cited
US5943568A Cited
US5851841A Cited
US5798903A Cited
US5777356A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-07-23 2005-01-22 2005-07-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-07-23 2009-01-22 2009-07-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-07-23 2013-01-22 2013-07-24 $7700.00 Window Closed / Lapsed

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