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US6329670B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Conductive material for integrated circuit fabrication

Assignee: Aptina Imaging Corp
•
Filing: 1999-04-06
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Granted: 2001-12-11
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Expires: 2019-04-06
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Abstract

Abstract A conductive composition of titanium boronitride (TiB x N y ) is disclosed for use as a conductive material. The titanium boronitride is used as conductive material in the testing and fabrication of integrated circuits. For example, the titanium boronitride is used to construct contact pads such as inline pads, backend pads, sensors or probes. Advantages of embodiments of the titanium boronitride include reduced scratching, increased hardness, finer granularity, thermal stability, good adhesion, and low bulk resistivity. Exemplary methods of creating the titanium boronitride include a sputtering process and a plasma anneal process.

Inventors

  • 👤 Yungjun Jeff Hu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 01:34
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/038; G; G01; G01R; G01R31/00; G01R31/28; G01R31/2851; G01R31/2884; H10P; H10P74/00; H10P74/27; H10P74/273; H10W20/047; H10W20/048; H10W20/40; H10W20/41; H10W20/44; H10W20/4403; H10W20/4437; H10W20/4441; H10W72/00; H10W72/90

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 127 words
A test pad fabricated in a semiconductor, the test pad comprising: a substrate; a metal layer; a first dielectric layer above the metal layer; a plug in the first dielectric layer, the plug in communication with the metal layer; an aluminum layer in communication with the plug wherein the aluminum layer is above the plug; a TiB x N y layer in communication with the aluminum layer wherein the TiB x N y layer is above the aluminum layer, the TiB x N y having an x-factor between about 0.5 and 2 and a y-factor between about 0.2 and 2; and a second dielectric layer above the TiB x N y layer wherein the second dielectric layer is etched to expose the TiB x N y layer.
Claim 2
Dependent Claim 127 words
A test pad fabricated in a semiconductor, the test pad comprising: a substrate; a metal layer; a first dielectric layer above the metal layer; a plug in the first dielectric layer, the plug in communication with the metal layer; an aluminum layer in communication with the plug wherein the aluminum layer is above the plug; a TiB x N y layer in communication with the aluminum layer wherein the TiB x N y layer is above the aluminum layer, the TiB x N y having an x-factor between about 0.5 and 2 and a y-factor between about 0.2 and 2; and a second dielectric layer above the TiB x N y layer wherein the second dielectric layer is etched to expose the TiB x N y layer.
Claim 3
Dependent Claim 14 words
The test pad of claim 1 , wherein the substrate comprises an integrated circuit.
Claim 4
Dependent Claim 16 words
The test pad of claim 1 , wherein the substrate comprises a dynamic random access memory.
Claim 5
Dependent Claim 18 words
The test pad of claim 1 , wherein the substrate comprises one or more semiconductor layers or structures.
Claim 6
Dependent Claim 17 words
The test pad of claim 1 , wherein the substrate comprises an intrinsically doped monocrystalline silicon wafer.
Claim 7
Dependent Claim 16 words
The test pad of claim 1 , wherein the substrate comprises operable portions of semiconductor devices.
Claim 8
Dependent Claim 15 words
The test pad of claim 1 , wherein the first dielectric layer is silicon oxide.
Claim 9
Dependent Claim 14 words
The test pad of claim 1 , wherein the first dielectric layer is nitride.
Claim 10
Dependent Claim 20 words
The test pad of claim 1 , wherein the TiB x N y layer has a hardness of 50 Gpa.
Claim 11
Dependent Claim 27 words
The test pad of claim 1 , wherein the TiB x N y layer has a bulk resistivity of approximately 40 to 300 microohm per centimeter (μΩcm).
Claim 12
Dependent Claim 23 words
The test pad of claim 1 , wherein the TiB x N y layer has a bulk resistivity of less than 100 μΩcm.
Claim 13
Dependent Claim 25 words
The test pad of claim, 1 , wherein the TiB x N y layer has a thermal stability of up to approximately 1,500 degrees centigrade.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-12-10 2005-06-11 2005-12-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-12-10 2009-06-11 2009-12-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-12-10 2013-06-11 2013-12-11 $7700.00 Window Closed / Lapsed

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