Patent US6316987B1 successfully refreshed from Google Patents.
← Back to Patent Explorer
US6316987B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Low-power low-jitter variable delay timing circuit

Assignee: LSI Corp
•
Filing: 1999-12-01
•
Granted: 2001-11-13
•
Expires: 2019-12-01
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The timing circuit includes at least one delay element and its supply voltage is obtained from an active current source. The current source is a current mirror which is driven by a differential amplifier. The differential amplifier compares a voltage on the delay clement supply line to a voltage on a current control node connected to a voltage controlled current source. An RC compensating circuit may be coupled to the current control node.

Inventors

  • 👤 William J. Dally
  • 👤 Ramin Farjad-Rad
  • 👤 Teva J. Stone
  • 👤 Xiaoying Yu
  • 👤 John W. Poulton

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 23:36
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/262

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 92 words
A timing circuit comprising: a delay element; and a source circuit supplying current to the delay element through a supply node, the source circuit including a differential amplifier which compares the voltage on the supply node to a voltage on a current control node to control the supplied current, the source circuit comprising a first transistor that sources reference current to the current control node, and a second transistor that supplies current to the delay element, the differential amplifier holding terminals of the first and second transistors at substantially the same voltage.
Claim 2
Dependent Claim 92 words
A timing circuit comprising: a delay element; and a source circuit supplying current to the delay element through a supply node, the source circuit including a differential amplifier which compares the voltage on the supply node to a voltage on a current control node to control the supplied current, the source circuit comprising a first transistor that sources reference current to the current control node, and a second transistor that supplies current to the delay element, the differential amplifier holding terminals of the first and second transistors at substantially the same voltage.
Claim 3
Dependent Claim 16 words
The timing circuit as claimed in claim 1 wherein the differential amplifier is an operational amplifier.
Claim 4
Dependent Claim 18 words
The timing circuit as claimed in claim 2 wherein the operational amplifier has a wide output voltage swing.
Claim 5
Dependent Claim 59 words
A timing circuit comprising: a delay element; a source circuit supplying current to the delay element through a supply node, the source circuit including a differential amplifier which compares the voltage on the supply node to a voltage on a current control node to control the supplied current; and an RC compensating circuit coupled to the current control node.
Claim 6
Dependent Claim 59 words
A timing circuit comprising: a delay element; a source circuit supplying current to the delay element through a supply node, the source circuit including a differential amplifier which compares the voltage on the supply node to a voltage on a current control node to control the supplied current; and an RC compensating circuit coupled to the current control node.
Claim 7
Dependent Claim 103 words
A timing circuit comprising: a delay element; and a source circuit supplying current to the delay element through a supply node, the source circuit including a differential amplifier which compares the voltage on the supply node to a voltage on a current control node to control the supplied current, the source circuit comprising a controlled current source, a first transistor in series with the controlled current source, and a second transistor supplying the current to the delay element, the current control node being between the first transistor and the current source, the differential amplifier driving the gates of the first and second transistors.
Claim 8
Dependent Claim 103 words
A timing circuit comprising: a delay element; and a source circuit supplying current to the delay element through a supply node, the source circuit including a differential amplifier which compares the voltage on the supply node to a voltage on a current control node to control the supplied current, the source circuit comprising a controlled current source, a first transistor in series with the controlled current source, and a second transistor supplying the current to the delay element, the current control node being between the first transistor and the current source, the differential amplifier driving the gates of the first and second transistors.
Claim 9
Dependent Claim 20 words
The timing circuit as claimed in claim 5 further comprising an RC compensating circuit coupled to the current control node.
Claim 10
Independent Claim 75 words
A method of providing power to a delay element comprising: sourcing reference current through a first transistor to a current control node; supplying current to the delay clement through a second transistor and a supply node; and comparing the voltage on the supply node to a voltage on the current control node in a differential amplifier which holds terminals of the first and second transistors at substantially the same voltage to control the supplied current.
Claim 11
Independent Claim 75 words
A method of providing power to a delay element comprising: sourcing reference current through a first transistor to a current control node; supplying current to the delay clement through a second transistor and a supply node; and comparing the voltage on the supply node to a voltage on the current control node in a differential amplifier which holds terminals of the first and second transistors at substantially the same voltage to control the supplied current.
Claim 12
Dependent Claim 15 words
The method as claimed in claim 7 wherein the differential amplifier is an operational amplifier.
Claim 13
Dependent Claim 17 words
The method as claimed in claim 8 wherein the operational amplifier has a wide output voltage swing.
Claim 14
Independent Claim 60 words
A method of providing power to a delay element comprising: supplying current to the delay element through a supply node; comparing the voltage on the supply node to a voltage on a current control node to control the supplied current; and phase compensating a current supply to the delay element with an RC circuit coupled to the current control node.
Claim 15
Independent Claim 60 words
A method of providing power to a delay element comprising: supplying current to the delay element through a supply node; comparing the voltage on the supply node to a voltage on a current control node to control the supplied current; and phase compensating a current supply to the delay element with an RC circuit coupled to the current control node.
Claim 16
Independent Claim 100 words
A method of providing power to a delay element comprising: sourcing current through a first transistor from a controlled current source; supplying current to the delay element through a second transistor and a supply node; and comparing the voltage on the supply node to a voltage on a current control node to control the supplied current, the current control node being between the first transistor and the controlled current source, the voltage on the supply node being compared to the voltage on the current control node through a differential amplifier which drives the gates of the first and second transistors.
Claim 17
Independent Claim 100 words
A method of providing power to a delay element comprising: sourcing current through a first transistor from a controlled current source; supplying current to the delay element through a second transistor and a supply node; and comparing the voltage on the supply node to a voltage on a current control node to control the supplied current, the current control node being between the first transistor and the controlled current source, the voltage on the supply node being compared to the voltage on the current control node through a differential amplifier which drives the gates of the first and second transistors.
Claim 18
Dependent Claim 21 words
The method as claimed in claim 11 further comprising compensating in an RC compensating circuit coupled to the current control node.
Claim 19
Dependent Claim 67 words
A timing circuit comprising: a delay element; a current source circuit supplying current to the delay element through a supply node, the current source circuit including a differential amplifier which compares the voltage on the supply node to a voltage on a current control node to control the supplied current; and a negative feedback loop from the output of the differential amplifier through the current control node.
Claim 20
Dependent Claim 67 words
A timing circuit comprising: a delay element; a current source circuit supplying current to the delay element through a supply node, the current source circuit including a differential amplifier which compares the voltage on the supply node to a voltage on a current control node to control the supplied current; and a negative feedback loop from the output of the differential amplifier through the current control node.
Claim 21
Independent Claim 56 words
A method of providing power to a delay element comprising: supplying current to the delay clement through a supply node; comparing the voltage on the supply node to a voltage on a current control node to control the supplied current; and providing negative feedback from the output of the differential amplifier through the current control node.
Claim 22
Independent Claim 56 words
A method of providing power to a delay element comprising: supplying current to the delay clement through a supply node; comparing the voltage on the supply node to a voltage on a current control node to control the supplied current; and providing negative feedback from the output of the differential amplifier through the current control node.

References Cited (Backward Citations)

US4922141A Cited
US6011428A Cited
US5473277A Cited
US5576656A Cited
US5596297A Cited
US5532653A Cited
US6046624A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-11-12 2005-05-14 2005-11-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-11-12 2009-05-14 2009-11-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-11-12 2013-05-14 2013-11-13 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag