Device and method for isolating a short-circuited integrated circuit (IC) from other IC's on a semiconductor wafer

Claim 2

In an integrated circuit (IC) having an internal circuit and an external terminal for communications between the internal circuit and circuitry external to the IC, a device for isolating the internal circuit from the external communications terminal, the device comprising: short-sensing control circuitry for sensing a short in the internal circuit and outputting a control signal in response thereto, the short-sensing control circuitry comprising: a first PMOS transistor having a source coupled to a supply terminal, a gate coupled to an output terminal, and a drain coupled to a control signal terminal; a first resistive device coupled between the supply terminal and the output terminal; a second resistive device coupled between the control signal terminal and a reference voltage bond pad; a second PMOS transistor having a source coupled to the supply terminal, a gate, and a drain coupled to the control signal terminal; and an inverter coupled between the control signal terminal and the gate of the second PMOS transistor; and switching circuitry coupled to the short-sensing control circuitry for isolating the internal circuit from the external communications terminal in response to receiving the control signal.

Claim 3

The device of claim 1 wherein the external communications terminal comprises a supply voltage bond pad for receiving a supply voltage from circuitry external to the IC, wherein the short-sensing control circuitry includes a supply terminal coupled to the supply voltage bond pad for receiving the supply voltage, an output terminal for outputting the received supply voltage, and a control signal terminal for outputting the control signal in response to a current flow between the supply terminal and the output terminal exceeding a predetermined threshold.

Claim 4

The device of claim 1 wherein the short-sensing control circuitry comprises circuitry for sensing current drawn by the internal circuit that exceeds a predetermined threshold and for outputting the control signal in response thereto.

Claim 5

The device of claim 1 wherein the short-sensing control circuitry comprises circuitry for sensing a voltage applied to the internal circuit that is below a predetermined threshold and for outputting the control signal in response thereto.

Claim 6

The device of claim 1 wherein the short-sensing control circuitry comprises circuitry for sensing a voltage applied to the internal circuit that is above a predetermined threshold and for outputting the control signal in response thereto.

Claim 7

An integrated circuit (IC) comprising: an external communications terminal; an internal circuit; switching circuitry coupled between the external communications terminal and the internal circuit for selectively isolating the internal circuit from the external communications terminal in response to receiving a control signal; and short-sensing control circuitry coupled to the external communications terminal and the switching circuitry for sensing a short in the internal circuit and outputting the control signal to the switching circuitry in response thereto, the short-sensing control circuitry comprising: a first PMOS transistor having a source coupled to a supply terminal, a gate coupled to an output terminal, and a drain coupled to a control signal terminal; a first resistive device coupled between the supply terminal and the output terminal; a second resistive device coupled between the control signal terminal and a reference voltage bond pad; a second PMOS transistor having a source coupled to the supply terminal, a gate, and a drain coupled to the control signal terminal; and an inverter coupled between the control signal terminal and the gate of the second PMOS transistor.

Claim 8

An integrated circuit (IC) comprising: an external communications terminal; an internal circuit; switching circuitry coupled between the external communications terminal and the internal circuit for selectively isolating the internal circuit from the external communications terminal in response to receiving a control signal; and short-sensing control circuitry coupled to the external communications terminal and the switching circuitry for sensing a short in the internal circuit and outputting the control signal to the switching circuitry in response thereto, the short-sensing control circuitry comprising: a first PMOS transistor having a source coupled to a supply terminal, a gate coupled to an output terminal, and a drain coupled to a control signal terminal; a first resistive device coupled between the supply terminal and the output terminal; a second resistive device coupled between the control signal terminal and a reference voltage bond pad; a second PMOS transistor having a source coupled to the supply terminal, a gate, and a drain coupled to the control signal terminal; and an inverter coupled between the control signal terminal and the gate of the second PMOS transistor.

Claim 9

The IC of claim 6 wherein the external communications terminal comprises a supply voltage bond pad.

Claim 10

The IC of claim 6 wherein the internal circuit is selected from a group of circuits comprising a Dynamic Random Access Memory (DRAM) circuit and a Static RAM (SRAM) circuit.

Claim 11

A semiconductor wafer comprising a plurality of integrated circuits, each comprising: an external communications terminal; an internal circuit; switching circuitry coupled between the external communications terminal and the internal circuit for selectively isolating the internal circuit from the external communications terminal in response to receiving a control signal; and short-sensing control circuitry coupled to the external communications terminal and the switching circuitry for sensing a short in the internal circuit and outputting the control signal to the switching circuitry in response thereto, the short-sensing control circuitry comprising: a first PMOS transistor having a source coupled to a supply terminal, a gate coupled to an output terminal, and a drain coupled to a control signal terminal; a first resistive device coupled between the supply terminal and the output terminal; a second resistive device coupled between the control signal terminal and a reference voltage bond pad; a second PMOS transistor having a source coupled to the supply terminal, a gate, and a drain coupled to the control signal terminal; and an inverter coupled between the control signal terminal and the gate of the second PMOS transistor.

Claim 12

A semiconductor wafer comprising a plurality of integrated circuits, each comprising: an external communications terminal; an internal circuit; switching circuitry coupled between the external communications terminal and the internal circuit for selectively isolating the internal circuit from the external communications terminal in response to receiving a control signal; and short-sensing control circuitry coupled to the external communications terminal and the switching circuitry for sensing a short in the internal circuit and outputting the control signal to the switching circuitry in response thereto, the short-sensing control circuitry comprising: a first PMOS transistor having a source coupled to a supply terminal, a gate coupled to an output terminal, and a drain coupled to a control signal terminal; a first resistive device coupled between the supply terminal and the output terminal; a second resistive device coupled between the control signal terminal and a reference voltage bond pad; a second PMOS transistor having a source coupled to the supply terminal, a gate, and a drain coupled to the control signal terminal; and an inverter coupled between the control signal terminal and the gate of the second PMOS transistor.

Claim 15

The method of claim 10 wherein the providing short-sensing control circuitry comprises providing short-sensing control circuitry within each IC for sensing current drawn by the IC that exceeds a predetermined threshold.

Claim 16

The method of claim 10 wherein the providing short-sensing control circuitry comprises providing short-sensing control circuitry within each IC for sensing a voltage within the IC that is below a predetermined threshold.

Claim 17

The method of claim 10 wherein the providing short-sensing control circuitry comprises providing short-sensing control circuitry within each IC for sensing a voltage within the IC that is above a predetermined threshold.

Claim 18

The method of claim 10 wherein the testing the ICs comprises probe testing the ICs.

Claim 19

The method of claim 10 wherein the isolating the IC with the short from the other ICs comprises opening a switch in the IC with the short that couples internal circuitry therein to the other ICs.

Claim 22

In an integrated circuit having an internal circuit, having a reference voltage bond pad, and having an external terminal for communication between the internal circuit and circuitry external to said integrated circuit, a device for isolating the internal circuit from said external terminal for communications, the device comprising: control circuitry for sensing a short in said internal circuit and outputting a control signal in response thereto, said control circuitry including a supply terminal coupled to said external terminal for communications for receiving a supply voltage, said external terminal comprising a supply voltage bond pad for receiving said supply voltage, an output terminal for outputting the supply voltage, and a control signal terminal for outputting a control signal in response to a current flow between the supply terminal and the output terminal exceeding a predetermined threshold, said control circuitry including: first PMOS transistor having a source coupled to the supply terminal, a gate coupled to the output terminal, and a drain coupled to the control signal terminal; a first resistive device coupled between the supply terminal and the output terminal; a second resistive device coupled between the control signal terminal and the reference voltage bond pad; a second PMOS transistor having a source coupled to the supply terminal, a gate, and a drain coupled to the control signal terminal; and an inverter coupled between the control signal terminal and the gate of the second PMOS transistor; and switching circuitry coupled to the control circuitry for isolating the internal circuit from said external terminal for communications in response to receiving the control signal.

Claim 23

In an integrated circuit having an internal circuit, having a reference voltage bond pad, and having an external terminal for communication between the internal circuit and circuitry external to said integrated circuit, a device for isolating the internal circuit from said external terminal for communications, the device comprising: control circuitry for sensing a short in said internal circuit and outputting a control signal in response thereto, said control circuitry including a supply terminal coupled to said external terminal for communications for receiving a supply voltage, said external terminal comprising a supply voltage bond pad for receiving said supply voltage, an output terminal for outputting the supply voltage, and a control signal terminal for outputting a control signal in response to a current flow between the supply terminal and the output terminal exceeding a predetermined threshold, said control circuitry including: first PMOS transistor having a source coupled to the supply terminal, a gate coupled to the output terminal, and a drain coupled to the control signal terminal; a first resistive device coupled between the supply terminal and the output terminal; a second resistive device coupled between the control signal terminal and the reference voltage bond pad; a second PMOS transistor having a source coupled to the supply terminal, a gate, and a drain coupled to the control signal terminal; and an inverter coupled between the control signal terminal and the gate of the second PMOS transistor; and switching circuitry coupled to the control circuitry for isolating the internal circuit from said external terminal for communications in response to receiving the control signal.