Semiconductor device structure including a tantalum pentoxide layer sandwiched between silicon nitride layers

Abstract

Abstract An insulating structure includes a first silicon nitride layer, a tantalum pentoxide layer formed above the first silicon nitride (SiN x ) layer, and a second silicon nitride layer formed above the tantalum pentoxide (Ta 2 O 5 ) layer. The SiN x cladding layers prevent difflusion of the tantalum during heating. A high dielectric constant is provided. The thermal stability of the insulating structure is improved. The insulating structure may be included in a capacitor or a shallow trench isolation structure. An exemplary capacitor is formed with a substrate, a lower electrode, the three-layer Si x N y /Ta 2 O 5 /Si x N y structure and an upper electrode. The lower electrode may include a TiN layer formed over an aluminum layer, or a TiN layer formed over a polysilicon layer, or a polysilicon layer having an oxide barrier layer formed on it. The upper electrode may be a TiN layer or a polysilicon layer. An exemplary shallow trench isolation structure includes the Si x N y /Ta 2 O 5 /Si x N y structure as a liner on the sides and bottom of a shallow trench in the surface of a substrate. The shallow trench is filled with an oxide, such as TEOS. A variety of methods may be used for fabricating devices that include the Si x N y /Ta 2 O 5 /Si x N y structure.

Inventors

• 👤 Sailesh Chittipeddi
• 👤 Charles Walter Pearce

Bibliographic Details