Patent US6259285B1 successfully refreshed from Google Patents.
US6259285B1
Expired / Lapsed
US
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Method and apparatus for detecting supply power loss
Assignee: Intel Corp
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Filing: 1997-12-05
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Granted: 2001-07-10
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Expires: 2017-12-05
Abstract
Abstract A circuit includes a fixed voltage drop circuit, a delay circuit, and a buffer. The delay circuit 13 coupled to the fixed voltage drop circuit, and the buffer 13 coupled to the delay circuit. The buffer has an activation voltage and is adapted to activate when the output of the delay circuit is less than the activation voltage. A method for detecting the loss of a power supply voltage includes coupling the power supply to a fixed voltage drop element to provide a first voltage at an output of the fixed voltage drop element. The first voltage is delayed to provide a second voltage, and the second voltage is provided to a buffer having an activation voltage. A reset signal is asserted at an output of the buffer when the second voltage is less than the activation voltage.
Inventors
- 👤 Gregory K. Woods
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 15:00
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/30; H03K17/302; H03K17/22; H03K17/223
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
99 words
A method comprising: applying a power supply voltage to a fixed voltage drop circuit to provide a dropped voltage substantially fixed below the power supply voltage; scaling the dropped voltage to provide a scaled voltage; delaying the scaled voltage to provide a delayed voltage, wherein the delaying comprises delaying the scaled voltage with a resistor-capacitor delay circuit; applying the delayed voltage to a buffer having an activation voltage; and asserting a reset signal at an output of the buffer when the delayed voltage is less than the activation voltage, wherein the buffer comprises a plurality of inverting hysteresis buffers.
Claim 2
Independent Claim
99 words
A method comprising: applying a power supply voltage to a fixed voltage drop circuit to provide a dropped voltage substantially fixed below the power supply voltage; scaling the dropped voltage to provide a scaled voltage; delaying the scaled voltage to provide a delayed voltage, wherein the delaying comprises delaying the scaled voltage with a resistor-capacitor delay circuit; applying the delayed voltage to a buffer having an activation voltage; and asserting a reset signal at an output of the buffer when the delayed voltage is less than the activation voltage, wherein the buffer comprises a plurality of inverting hysteresis buffers.
Claim 3
Dependent Claim
22 words
The method of claim 1 , wherein the applying the power supply voltage comprises applying the power supply voltage to a diode.
Claim 4
Dependent Claim
18 words
The method of claim 1 , wherein the scaling comprises scaling the dropped voltage with a voltage divider.
Claim 5
Dependent Claim
25 words
The method of claim 1 , wherein the asserting comprises asserting a low reset signal when the delayed voltage is less than the activation voltage.
Claim 6
Dependent Claim
23 words
The method of claim 1 , wherein the applying the power supply voltage comprises applying the power supply voltage to a dual diode.
Claim 7
Dependent Claim
15 words
The method of claim 3 , wherein the voltage divider comprises a plurality of resistors.
Claim 8
Dependent Claim
95 words
A circuit comprising: a fixed voltage drop circuit to provide a dropped voltage substantially fixed below a power supply voltage; a scaling circuit coupled to the fixed voltage drop circuit to scale the dropped voltage; a delay circuit coupled to the scaling circuit to delay the scaled voltage, wherein the delay circuit comprises a resistor-capacitor delay circuit; and a buffer coupled to the delay circuit, the buffer having an activation voltage to assert a reset signal when the delayed voltage is less than the activation voltage, the buffer comprising a plurality of inverting hysteresis buffers.
Claim 9
Dependent Claim
95 words
A circuit comprising: a fixed voltage drop circuit to provide a dropped voltage substantially fixed below a power supply voltage; a scaling circuit coupled to the fixed voltage drop circuit to scale the dropped voltage; a delay circuit coupled to the scaling circuit to delay the scaled voltage, wherein the delay circuit comprises a resistor-capacitor delay circuit; and a buffer coupled to the delay circuit, the buffer having an activation voltage to assert a reset signal when the delayed voltage is less than the activation voltage, the buffer comprising a plurality of inverting hysteresis buffers.
Claim 10
Dependent Claim
15 words
The circuit of claim 7 , wherein the fixed voltage drop circuit comprises a diode.
Claim 11
Dependent Claim
14 words
The circuit of claim 7 , wherein the scaling circuit comprises a voltage divider.
Claim 12
Dependent Claim
26 words
The circuit of claim 7 , wherein the buffer is to assert a low reset signal when the delayed voltage is less than the activation voltage.
Claim 13
Dependent Claim
16 words
The circuit of claim 7 , wherein the fixed voltage drop circuit comprises a dual diode.
Claim 14
Dependent Claim
15 words
The circuit of claim 9 , wherein the voltage divider comprises a plurality of resistors.
Claim 15
Dependent Claim
120 words
A computer system comprising: (a) a power supply to provide a power supply voltage; and (b) a chipset comprising: (i) a fixed voltage drop circuit coupled to the power supply to provide a dropped voltage substantially fixed below the power supply voltage, (ii) a scaling circuit coupled to the fixed voltage drop circuit to scale the dropped voltage, (iii) a delay circuit coupled to the scaling circuit to delay the scaled voltage, wherein the delay circuit comprises a resistor-capacitor delay circuit, and (iv) a buffer coupled to the delay circuit, the buffer having an activation voltage to assert a reset signal when the delayed voltage is less than the activation voltage, the buffer comprising a plurality of inverting hysteresis buffers.
Claim 16
Dependent Claim
120 words
A computer system comprising: (a) a power supply to provide a power supply voltage; and (b) a chipset comprising: (i) a fixed voltage drop circuit coupled to the power supply to provide a dropped voltage substantially fixed below the power supply voltage, (ii) a scaling circuit coupled to the fixed voltage drop circuit to scale the dropped voltage, (iii) a delay circuit coupled to the scaling circuit to delay the scaled voltage, wherein the delay circuit comprises a resistor-capacitor delay circuit, and (iv) a buffer coupled to the delay circuit, the buffer having an activation voltage to assert a reset signal when the delayed voltage is less than the activation voltage, the buffer comprising a plurality of inverting hysteresis buffers.
Claim 17
Dependent Claim
27 words
The computer system of claim 13 , wherein the buffer is to assert a low reset signal when the delayed voltage is less than the activation voltage.
Claim 18
Dependent Claim
16 words
The computer system of claim 13 , wherein the fixed voltage drop circuit comprises a diode.
Claim 19
Dependent Claim
15 words
The computer system of claim 13 , wherein the scaling circuit comprises a voltage divider.
Claim 20
Dependent Claim
17 words
The computer system of claim 13 , wherein the fixed voltage drop circuit comprises a dual diode.
Claim 21
Dependent Claim
16 words
The computer system of claim 16 , wherein the voltage divider comprises a plurality of resistors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-07-09 | 2005-01-08 | 2005-07-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-07-09 | 2009-01-08 | 2009-07-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-07-09 | 2013-01-08 | 2013-07-10 | $7700.00 | Window Closed / Lapsed |