Patent US1529983A successfully refreshed from Google Patents.
Patent US6255703B1 successfully refreshed from Google Patents.
US6255703B1
Expired / Lapsed
US
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Device with lower LDD resistance
Assignee: GlobalFoundries Inc
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Filing: 1999-06-02
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Granted: 2001-07-03
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Expires: 2019-06-02
Abstract
Abstract A method is provided for fabricating a semiconductor device on a structure, the method including forming a dielectric layer adjacent a gate conductor of the semiconductor device and above an LDD region of the structure and forming a first dielectric spacer adjacent a first portion of the dielectric layer adjacent the gate conductor and above a second portion of the dielectric layer above the LDD region. The method also includes introducing a dopant into a source/drain region of the structure and removing a third portion of the dielectric layer above the gate conductor, the second portion of the dielectric layer above the LDD region, and the first dielectric spacer. In addition, the method includes forming a first conductive layer above the gate conductor, adjacent the first portion of the dielectric layer and above the LDD region, and saliciding the first conductive layer above the gate conductor and above the LDD region to form a salicided first conductive layer.
Inventors
- 👤 Frederick N. Hause
- 👤 Manfred Horstmann
- 👤 Karsten Wieczorek
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 19:56
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0212; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D64/60; H10D64/66; H10D64/671; H10D64/675; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/01342; H10D64/01344; H10D64/68; H10D64/691; H10D64/693
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
79 words
A semiconductor device comprising: a structure layer; a gate dielectric above the structure layer; a gate conductor above the gate dielectric; an LDD region of the structure layer adjacent the gate dielectric and the gate conductor; a dielectric layer adjacent the gate conductor and the gate dielectric; a salicided first conductive layer above the gate conductor and directly contacting at least a portion of the LDD region; and a dielectric spacer adjacent the dielectric layer adjacent the gate conductor.
Claim 2
Dependent Claim
79 words
A semiconductor device comprising: a structure layer; a gate dielectric above the structure layer; a gate conductor above the gate dielectric; an LDD region of the structure layer adjacent the gate dielectric and the gate conductor; a dielectric layer adjacent the gate conductor and the gate dielectric; a salicided first conductive layer above the gate conductor and directly contacting at least a portion of the LDD region; and a dielectric spacer adjacent the dielectric layer adjacent the gate conductor.
Claim 3
Dependent Claim
38 words
The semiconductor device of claim 1 , the semiconductor device further comprising: a source/drain region of the structure layer adjacent the dielectric spacer; and a salicided second conductive layer above the gate conductor and above the source/drain region.
Claim 4
Dependent Claim
40 words
The semiconductor device of claim 2 , wherein the first conductive layer includes one of titanium, tantalum, nickel, zirconium, tungsten, molybdenum and cobalt and wherein the second conductive layer includes one of titanium, tantalum, nickel, zirconium, tungsten, molybdenum and cobalt.
Claim 5
Dependent Claim
19 words
The semiconductor device of claim 1 , wherein the dielectric layer includes one of an oxide and an oxynitride.
Claim 6
Dependent Claim
21 words
The semiconductor device of claim 2 , wherein the dielectric spacer includes one of an oxide, a nitride and an oxynitride.
Claim 7
Dependent Claim
96 words
A MOSFET comprising: a substrate; a gate dielectric above the substrate; a gate conductor above the gate dielectric; LDD regions of the substrate adjacent the gate dielectric and the gate conductor; a dielectric layer adjacent the gate conductor and the gate dielectric; a salicided first conductive layer above the gate conductor and directly contacting at least a portion of the LDD regions; dielectric spacers adjacent the dielectric layer adjacent the gate conductor; source/drain regions of the substrate adjacent the dielectric spacers; and a salicided second conductive layer above the gate conductor and above the source/drain regions.
Claim 8
Dependent Claim
96 words
A MOSFET comprising: a substrate; a gate dielectric above the substrate; a gate conductor above the gate dielectric; LDD regions of the substrate adjacent the gate dielectric and the gate conductor; a dielectric layer adjacent the gate conductor and the gate dielectric; a salicided first conductive layer above the gate conductor and directly contacting at least a portion of the LDD regions; dielectric spacers adjacent the dielectric layer adjacent the gate conductor; source/drain regions of the substrate adjacent the dielectric spacers; and a salicided second conductive layer above the gate conductor and above the source/drain regions.
Claim 9
Dependent Claim
22 words
The MOSFET of claim 6 , wherein the first conductive layer includes one of titanium, tantalum, nickel, zirconium, tungsten, molybdenum and cobalt.
Claim 10
Dependent Claim
22 words
The MOSFET of claim 6 , wherein the second conductive layer includes one of titanium, tantalum, nickel, zirconium, tungsten, molybdenum and cobalt.
Claim 11
Dependent Claim
18 words
The MOSFET of claim 6 , wherein the dielectric layer includes one of an oxide and an oxynitride.
Claim 12
Dependent Claim
20 words
The MOSFET of claim 6 , wherein the dielectric spacers include one of an oxide, a nitride and an oxynitride.
Claim 13
Dependent Claim
83 words
A semiconductor device comprising: a structure layer; a gate dielectric above the structure layer; a gate conductor above the gate dielectric; an LDD region of the structure layer adjacent the gate dielectric and the gate conductor; a dielectric layer adjacent and directly contacting both the gate conductor and the gate dielectric; a salicided first conductive layer above the gate conductor and directly contacting at least a portion of the LDD region; and a dielectric spacer adjacent the dielectric layer adjacent the gate conductor.
Claim 14
Dependent Claim
83 words
A semiconductor device comprising: a structure layer; a gate dielectric above the structure layer; a gate conductor above the gate dielectric; an LDD region of the structure layer adjacent the gate dielectric and the gate conductor; a dielectric layer adjacent and directly contacting both the gate conductor and the gate dielectric; a salicided first conductive layer above the gate conductor and directly contacting at least a portion of the LDD region; and a dielectric spacer adjacent the dielectric layer adjacent the gate conductor.
Claim 15
Dependent Claim
37 words
The semiconductor device of claim 11 , the semiconductor device further comprising: a source/drain region of the structure adjacent the dielectric spacer; and a salicided second conductive layer above the gate conductor and above the source/drain region.
Claim 16
Dependent Claim
40 words
The semiconductor device of claim 12 , wherein the first conductive layer includes one of titanium, tantalum, nickel, zirconium, tungsten, molybdenum and cobalt and wherein the second conductive layer includes one of titanium, tantalum, nickel, zirconium, tungsten, molybdenum and cobalt.
Claim 17
Dependent Claim
19 words
The semiconductor device of claim 11 , wherein the dielectric layer includes one of an oxide and an oxynitride.
Claim 18
Dependent Claim
21 words
The semiconductor device of claim 12 , wherein the dielectric spacer includes one of an oxide, a nitride and an oxynitride.
Claim 19
Dependent Claim
100 words
A MOSFET comprising: a substrate; a gate dielectric above the substrate; a gate conductor above the gate dielectric; LDD regions of the substrate adjacent the gate dielectric and the gate conductor; a dielectric layer adjacent and directly contacting both the gate conductor and the gate dielectric; a salicided first conductive layer above the gate conductor and directly contacting at least a portion of the LDD regions; dielectric spacers adjacent the dielectric layer adjacent the gate conductor; source/drain regions of the substrate adjacent the dielectric spacers; and a salicided second conductive layer above the gate conductor and above the source/drain regions.
Claim 20
Dependent Claim
100 words
A MOSFET comprising: a substrate; a gate dielectric above the substrate; a gate conductor above the gate dielectric; LDD regions of the substrate adjacent the gate dielectric and the gate conductor; a dielectric layer adjacent and directly contacting both the gate conductor and the gate dielectric; a salicided first conductive layer above the gate conductor and directly contacting at least a portion of the LDD regions; dielectric spacers adjacent the dielectric layer adjacent the gate conductor; source/drain regions of the substrate adjacent the dielectric spacers; and a salicided second conductive layer above the gate conductor and above the source/drain regions.
Claim 21
Dependent Claim
22 words
The MOSFET of claim 16 , wherein the first conductive layer includes one of titanium, tantalum, nickel, zirconium, tungsten, molybdenum and cobalt.
Claim 22
Dependent Claim
22 words
The MOSFET of claim 16 , wherein the second conductive layer includes one of titanium, tantalum, nickel, zirconium, tungsten, molybdenum and cobalt.
Claim 23
Dependent Claim
18 words
The MOSFET of claim 16 , wherein the dielectric layer includes one of an oxide and an oxynitride.
Claim 24
Dependent Claim
20 words
The MOSFET of claim 16 , wherein the dielectric spacers include one of an oxide, a nitride and an oxynitride.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-07-02 | 2005-01-01 | 2005-07-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-07-02 | 2009-01-01 | 2009-07-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-07-02 | 2013-01-01 | 2013-07-03 | $7700.00 | Window Closed / Lapsed |