Abstract A semiconductor device is provided, which makes it possible to decrease the electric sheet resistance of source/drain regions of MOSFETs in a peripheral circuitry without degradation of the data writing speed in nonvolatile memory cells. This device is comprised of nonvolatile memory cells and a peripheral circuitry provided on a same semiconductor substrate. The nonvolatile memory cells are formed by a first plurality of MOSFETs of a first conductivity type. The peripheral circuitry includes a second plurality of MOSFETs of the first conductivity type. Each of the first plurality of MOSFETs is equipped with a gate electrode having a floating gate for data storing and source/drain regions having substantially no silicide films. Each of the second plurality of MOSFETs is equipped with source/drain regions having silicide films and a doping concentration lower than that of the source/drain regions of each of the first plurality of MOSFETs. It is preferred that the doping concentration of the source/drain regions of the first plurality of MOSFETs is equal to 1×10 19 atoms/cm 3 or higher and the doping concentration of the source/drain regions of the second plurality of MOSFETs is lower than 1×10 19 atoms/cm 3 .
A semiconductor device comprising: (a) nonvolatile memory cells provided on a semiconductor substrate; said nonvolatile memory cells being formed by a first plurality of MOSFETs of a first conductivity type; each of said first plurality of MOSFETs being equipped with a gate electrode having a floating gate for data storing and source/drain regions having substantially no silicide films; (b) a peripheral circuitry provided on said semiconductor substrate; said peripheral circuitry including a second plurality of MOSFETs of said first conductivity type; each of said second plurality of MOSFETs being equipped with source/drain regions having silicide films and a doping concentration lower than that of said source/drain regions of each of said first plurality of MOSFETs.
Claim 2
Dependent Claim
115 words
A semiconductor device comprising: (a) nonvolatile memory cells provided on a semiconductor substrate; said nonvolatile memory cells being formed by a first plurality of MOSFETs of a first conductivity type; each of said first plurality of MOSFETs being equipped with a gate electrode having a floating gate for data storing and source/drain regions having substantially no silicide films; (b) a peripheral circuitry provided on said semiconductor substrate; said peripheral circuitry including a second plurality of MOSFETs of said first conductivity type; each of said second plurality of MOSFETs being equipped with source/drain regions having silicide films and a doping concentration lower than that of said source/drain regions of each of said first plurality of MOSFETs.
Claim 3
Dependent Claim
23 words
The device as claimed in claim 1, wherein each of said second plurality of MOSFETs in said peripheral circuitry has a SALICIDE structure.
Claim 4
Dependent Claim
62 words
The device as claimed in claim 1, wherein each of said doping concentration of said source/drain regions of said first plurality of MOSFETs in said memory cells is equal to 1×10 19 atoms/cm 3 or higher and said doping concentration of said source/drain regions of said second plurality of MOSFETs in said peripheral circuitry is lower than 1×10 19 atoms/cm 3 .
Claim 5
Dependent Claim
72 words
The device as claimed in claim 1, wherein each of said peripheral circuitry includes a third plurality of MOSFETs of a second conductivity type opposite to said first conductivity type, thereby forming a CMOS structure; and wherein each of said third plurality of MOSFETs is equipped with source drain regions having silicide films and a doping concentration lower than that of said source/drain regions of each of said first plurality of MOSFETs.
Claim 6
Dependent Claim
23 words
The device as claimed in claim 4, wherein each of said third plurality of MOSFETs in said peripheral circuitry has a SALICIDE structure.
Claim 7
Dependent Claim
31 words
The device as claimed in claim 4, wherein each of said doping concentration of said source/drain regions of said third plurality of MOSFETS is lower than 1×10 19 atoms/cm 3 .