US5883418A
Expired / Lapsed
US
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Semiconductor device with particular silicide structure
Assignee: Mitsubishi Electric Corp
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Filing: 1997-06-11
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Granted: 1999-03-16
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Expires: 2017-06-11
Abstract
Abstract A silicide layer having a two-layer structure or a silicide layer made of material having high etching selectivity is formed on a silicon layer constituting a gate electrode, causing the silicide layer to serve as an etching stopper at the time of forming a contact hole. Furthermore, a top surface of an insulating layer in which a contact hole is formed is planarized by a CMP method, facilitating subsequent formation of an interconnection or the like. In addition, when a silicide layer consisting of two layers is formed on the gate electrode, each of those two layers can be made of either the same material or materials different from each other. Thus, even if contact holes extending to the gate electrode and source/drain regions are simultaneously formed in the planarized insulating layer, lower layers of the gate electrode and the source/drain regions will not be etched, resulting in a semiconductor device in which an interconnection on the insulating layer can be formed easily.
Inventors
- 👤 Masatoshi Kimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 03:06
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D64/00; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H10D64/663; H10D62/00; H10D62/80; H10D62/83; H10D64/62; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0172; H10D84/0174; H10D84/02; H10D84/03; H10D84/038; H10W; H10W20/00; H10W20/40
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
179 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said gate electrode layer and the main surface of said semiconductor substrate; a first silicide layer formed to be in contact with a surface of said source/drain region and having a first thickness; a second silicide layer formed of a single silicide layer to be in contact with a surface of said gate electrode layer and having a second thickness larger than said first thickness; and an insulating layer formed on said gate electrode layer and said source/drain regions, having contact holes reaching to respective surfaces of said first and second silicide layers, and having a substantially flat planarized top surface, wherein the second thickness of the second silicide layer is large enough to prevent penetration therethrough to the underlying gate electrode layer during etching to form said contact holes.
Claim 2
Dependent Claim
179 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said gate electrode layer and the main surface of said semiconductor substrate; a first silicide layer formed to be in contact with a surface of said source/drain region and having a first thickness; a second silicide layer formed of a single silicide layer to be in contact with a surface of said gate electrode layer and having a second thickness larger than said first thickness; and an insulating layer formed on said gate electrode layer and said source/drain regions, having contact holes reaching to respective surfaces of said first and second silicide layers, and having a substantially flat planarized top surface, wherein the second thickness of the second silicide layer is large enough to prevent penetration therethrough to the underlying gate electrode layer during etching to form said contact holes.
Claim 3
Dependent Claim
22 words
The semiconductor device according to claim 1, wherein each of said first and second silicide layers comprises a refractory metal silicide layer.
Claim 4
Dependent Claim
15 words
The semiconductor device according to claim 2, wherein said refractory metal silicide is titanium silicide.
Claim 5
Dependent Claim
191 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said gate electrode layer and the main surface of said semiconductor substrate; a first silicide layer formed to be in contact with a surface of said source/drain region and having a first thickness; a second silicide layer formed to be in contact with a surface of said gate electrode layer and having a second thickness larger than said first thickness; and an insulating layer formed on said gate electrode layer and said source/drain regions, having contact holes reaching to respective surfaces of said first and second silicide layers, and having a substantially flat planarized top surface, wherein the second thickness of the second silicide layer is large enough to prevent penetration therethrough to the underlying gate electrode layer during etching to form said contact holes, and said second layer is made of the same material as that of said first silicide layer.
Claim 6
Dependent Claim
191 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said gate electrode layer and the main surface of said semiconductor substrate; a first silicide layer formed to be in contact with a surface of said source/drain region and having a first thickness; a second silicide layer formed to be in contact with a surface of said gate electrode layer and having a second thickness larger than said first thickness; and an insulating layer formed on said gate electrode layer and said source/drain regions, having contact holes reaching to respective surfaces of said first and second silicide layers, and having a substantially flat planarized top surface, wherein the second thickness of the second silicide layer is large enough to prevent penetration therethrough to the underlying gate electrode layer during etching to form said contact holes, and said second layer is made of the same material as that of said first silicide layer.
Claim 7
Dependent Claim
32 words
The semiconductor device according to claim 4, wherein each of said second layer and said first silicide layer comprises a titanium silicide layer, and said first layer comprises a cobalt silicide layer.
Claim 8
Dependent Claim
80 words
The semiconductor device according to claim 1, further comprising: an element isolation insulating layer formed at the main surface of said semiconductor substrate, and having a top surface being substantially flush with the main surface of said semiconductor substrate; and a second gate electrode layer formed on said element isolation insulating layer, wherein a top surface of said gate electrode layer is located at a substantially same height as that of a top surface of said second gate electrode layer.
Claim 9
Dependent Claim
144 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said gate electrode layer and said main surface of the semiconductor substrate; a first silicide layer formed to be in contact with each surface of said source/drain regions; a second silicide layer formed to be in contact with a surface of said gate electrode layer, and is made of material different from that of said first silicide layer; a titanium nitride layer formed on said second silicide layer; and a sidewall insulating layer formed to be in contact with respective sidewalls of said gate electrode layer, said second silicide layer and said titanium nitride layer.
Claim 10
Dependent Claim
144 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said gate electrode layer and said main surface of the semiconductor substrate; a first silicide layer formed to be in contact with each surface of said source/drain regions; a second silicide layer formed to be in contact with a surface of said gate electrode layer, and is made of material different from that of said first silicide layer; a titanium nitride layer formed on said second silicide layer; and a sidewall insulating layer formed to be in contact with respective sidewalls of said gate electrode layer, said second silicide layer and said titanium nitride layer.
Claim 11
Dependent Claim
29 words
The semiconductor device according to claim 7, wherein said second silicide layer is made of material of which etching rate is lower than that of said first silicide layer.
Claim 12
Dependent Claim
27 words
The semiconductor device according to claim 7, wherein said first silicide layer has a titanium silicide layer, and said second silicide layer has a cobalt silicide layer.
Claim 13
Dependent Claim
166 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said gate electrode layer and said main surface of said semiconductor substrate, said gate electrode layer having an upper surface and side surfaces; a first silicide layer formed to be in contact with each surface of said source/drain regions; and a second silicide layer formed to be in contact with said upper surface of said gate electrode layer and having side surfaces, wherein said second silicide layer includes a first layer formed on said gate electrode layer, a second layer formed on said first layer and is made of material different from that of said first layer, and an insulating sidewall spacer formed in contact with the side surfaces of the gate electrode and second silicide layer.
Claim 14
Dependent Claim
166 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said gate electrode layer and said main surface of said semiconductor substrate, said gate electrode layer having an upper surface and side surfaces; a first silicide layer formed to be in contact with each surface of said source/drain regions; and a second silicide layer formed to be in contact with said upper surface of said gate electrode layer and having side surfaces, wherein said second silicide layer includes a first layer formed on said gate electrode layer, a second layer formed on said first layer and is made of material different from that of said first layer, and an insulating sidewall spacer formed in contact with the side surfaces of the gate electrode and second silicide layer.
Claim 15
Dependent Claim
27 words
The semiconductor device according to claim 10, wherein said first layer is made of material of which etching rate is lower than that of said second layer.
Claim 16
Dependent Claim
25 words
The semiconductor device according to claim 10, wherein said first layer has a cobalt silicide layer, and said second layer has a titanium silicide layer.
Claim 17
Dependent Claim
81 words
The semiconductor device according to claim 10, further comprising: an element isolation insulating layer formed at the main surface of said semiconductor substrate such that a top surface thereof is substantially flush with the main surface of said semiconductor substrate; and a second gate electrode layer formed on said element isolation insulating layer, wherein a top surface of said gate electrode layer is located at a substantially same height as that of a top surface of said second gate electrode layer.
Claim 18
Dependent Claim
195 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said gate electrode and said main surface of the semiconductor substrate; a first silicide layer formed to be in contact with a surface of said source/drain region and having a first thickness; a second silicide layer formed to be in contact with a surface of said gate electrode layer and having a second thickness larger than said first thickness; and an insulating layer formed on said gate electrode layer and said source/drain regions, having contact holes reaching to respective surfaces of said first and second silicide layers, and having a substantially flat top surface, wherein said second silicide layer includes a first layer formed on said gate electrode layer; and a second layer formed on said first layer and is made of material different from that of said first layer, and said second layer is made of material same as that of said first silicide layer.
Claim 19
Dependent Claim
195 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said gate electrode and said main surface of the semiconductor substrate; a first silicide layer formed to be in contact with a surface of said source/drain region and having a first thickness; a second silicide layer formed to be in contact with a surface of said gate electrode layer and having a second thickness larger than said first thickness; and an insulating layer formed on said gate electrode layer and said source/drain regions, having contact holes reaching to respective surfaces of said first and second silicide layers, and having a substantially flat top surface, wherein said second silicide layer includes a first layer formed on said gate electrode layer; and a second layer formed on said first layer and is made of material different from that of said first layer, and said second layer is made of material same as that of said first silicide layer.
Claim 20
Dependent Claim
32 words
The semiconductor device according to claim 14, wherein each of said second layer and said first silicide layer comprises a titanium silicide layer, and said first layer comprises a cobalt silicide layer.
Claim 21
Dependent Claim
149 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said rate electrode layer and said main surface of the semiconductor substrate; a first silicide layer formed to be in contact with each surface of said source/drain regions; and a second silicide layer formed to be in contact with a surface of said gate electrode layer, wherein said second silicide layer includes a first layer formed on said gate electrode layer, and a second layer formed on said first layer and is made of material different from that of said first layer, wherein said first layer comprises a cobalt silicide layer, and said second layer comprises a titanium silicide layer.
Claim 22
Dependent Claim
149 words
A semiconductor device, comprising: a semiconductor substrate having a main surface; a pair of source/drain regions formed with a prescribed space therebetween defining a channel region at the main surface of said semiconductor substrate; a gate electrode layer formed on said channel region with a gate insulating layer between said rate electrode layer and said main surface of the semiconductor substrate; a first silicide layer formed to be in contact with each surface of said source/drain regions; and a second silicide layer formed to be in contact with a surface of said gate electrode layer, wherein said second silicide layer includes a first layer formed on said gate electrode layer, and a second layer formed on said first layer and is made of material different from that of said first layer, wherein said first layer comprises a cobalt silicide layer, and said second layer comprises a titanium silicide layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-15 | 2002-09-14 | 2003-03-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-15 | 2006-09-14 | 2007-03-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-15 | 2010-09-14 | 2011-03-16 | $7700.00 | Window Closed / Lapsed |