Patent US6180971B1 successfully refreshed from Google Patents.
US6180971B1
Expired / Lapsed
US
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Capacitor and method of manufacturing the same
Assignee: NEC Corp
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Filing: 1998-11-23
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Granted: 2001-01-30
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Expires: 2018-11-23
Abstract
Abstract In the manufacture of an integrated circuit memory capacitor, an underlying hydrogen barrier layer, either electrically nonconductive or conductive, is formed on a substrate. Then, the lower electrode layer and the ferroelectric/dielectric layer are formed and selectively etched. A nonconductive hydrogen barrier layer is formed on the dielectric layer and selectively etched. After a heat treatment in oxygen, the upper electrode layer and a conductive hydrogen barrier layer are successively deposited and selectively etched. The nonconductive hydrogen barrier layer covers the capacitor except for a part of the upper electrode, and the conductive hydrogen barrier layer covers a portion where there is no nonconductive hydrogen barrier layer. Thus, the underlying barrier layer, the nonconductive barrier layer and the conductive barrier layer together completely cover the memory capacitor. The dielectric layer comprises a ferroelectric or high-dielectric constant metal oxide. The nonconductive hydrogen barrier layer is typically SiN. The conductive hydrogen barrier layer is typically a metal nitride, such as TiN or AlN.
Inventors
- 👤 Yukihiko Maejima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 10:47
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682; H10D1/692; H10D1/696; H10P; H10P14/00; H10P14/40; H10P14/418
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
73 words
A memory device comprising: a capacitor, said capacitor having a lower electrode, a dielectric layer, and an upper electrode; a nonconductive hydrogen barrier layer, said nonconductive hydrogen barrier layer covering said capacitor, except for a region including at least a part of said upper electrode; and a conductive hydrogen barrier layer, at least part of said conductive hydrogen barrier layer completely covering said region that said nonconductive hydrogen barrier layer does not cover.
Claim 2
Dependent Claim
73 words
A memory device comprising: a capacitor, said capacitor having a lower electrode, a dielectric layer, and an upper electrode; a nonconductive hydrogen barrier layer, said nonconductive hydrogen barrier layer covering said capacitor, except for a region including at least a part of said upper electrode; and a conductive hydrogen barrier layer, at least part of said conductive hydrogen barrier layer completely covering said region that said nonconductive hydrogen barrier layer does not cover.
Claim 3
Dependent Claim
17 words
A memory device as claimed in claim 1 , wherein: said nonconductive hydrogen barrier layer comprises SiN.
Claim 4
Dependent Claim
19 words
A memory device as claimed in claim 1 , wherein: said conductive hydrogen barrier layer comprises a metal nitride.
Claim 5
Dependent Claim
24 words
A memory device as claimed in claim 3 , wherein: said metal nitride comprises one selected from the group consisting of TiN and AlN.
Claim 6
Dependent Claim
22 words
A memory device as claimed in claim 1 , wherein: an underlying conductive hydrogen barrier layer is located under said lower electrode.
Claim 7
Dependent Claim
20 words
A memory device as claimed in claim 5 , wherein: said underlying conductive hydrogen barrier layer comprises a metal nitride.
Claim 8
Dependent Claim
24 words
A memory device as claimed in claim 6 , wherein: said metal nitride comprises one selected from the group consisting of TiN and AlN.
Claim 9
Dependent Claim
23 words
A memory device as claimed in claim 5 , wherein: said underlying conductive hydrogen barrier layer is formed directly on a silicon substrate.
Claim 10
Dependent Claim
19 words
A memory device as claimed in claim 8 , wherein: an integrated circuit is formed on said silicon substrate.
Claim 11
Dependent Claim
34 words
A memory device as claimed in claim 5 , wherein: a base insulating film is formed on a silicon substrate; and said underlying conductive hydrogen barrier layer is formed on said base insulating film.
Claim 12
Dependent Claim
19 words
A memory device as claimed in claim 10 , wherein: an integrated circuit is formed on said silicon substrate.
Claim 13
Dependent Claim
36 words
A memory device as claimed in claim 5 , characterized in that: said capacitor is completely enclosed in all directions by said nonconductive hydrogen, said conductive hydrogen barrier layer, and said underlying conductive hydrogen barrier layer.
Claim 14
Dependent Claim
22 words
A memory device as claimed in claim 1 , wherein: an underlying nonconductive hydrogen barrier layer is located under said lower electrode.
Claim 15
Dependent Claim
18 words
A memory device as claimed in claim 13 , wherein: said underlying nonconductive hydrogen barrier layer comprises SiN.
Claim 16
Dependent Claim
23 words
A memory device as claimed in claim 13 , wherein: said underlying nonconductive hydrogen barrier layer is formed directly on a silicon substrate.
Claim 17
Dependent Claim
19 words
A memory device as claimed in claim 15 , wherein: an integrated circuit is formed on said silicon substrate.
Claim 18
Dependent Claim
34 words
A memory device as claimed in claim 8 , wherein: a base insulating film is formed on a silicon substrate; and said underlying nonconductive hydrogen barrier layer is formed on said base insulating film.
Claim 19
Dependent Claim
19 words
A memory device as claimed in claim 17 , wherein: an integrated circuit is formed on said silicon substrate.
Claim 20
Dependent Claim
38 words
A memory device as claimed in claim 8 , characterized in that: said capacitor is completely enclosed in all directions by said nonconductive hydrogen barrier layer, said conductive hydrogen barrier layer, and said underlying nonconductive hydrogen barrier layer.
Claim 21
Dependent Claim
22 words
A memory device as claimed in claim 1 , wherein: said conductive hydrogen barrier layer is located directly on said upper electrode.
Claim 22
Dependent Claim
31 words
A memory device as claimed in claim 1 , further comprising: a buffer film located on said upper electrode; wherein said conductive hydrogen barrier layer is located on said buffer film.
Claim 23
Dependent Claim
42 words
A memory device as claimed in claim 1 , wherein: said dielectric layer comprises one selected from the group consisting of Pb(Zr 1−X Ti X )O 3 , SrBi 2 Ta 2 O 9 and (Ba 1−X Sr X )TiO 3 .
Claim 24
Dependent Claim
37 words
A memory device as claimed in claim 1 , wherein: each of said upper electrode and said lower electrode comprises one selected from a group consisting of Pt, Ir, IrO 2 , Ru and RuO 2 .
Claim 25
Dependent Claim
43 words
A memory device as claimed in claim 1 , characterized in that: said nonconductive hydrogen barrier layer has a contact opening to said dielectric layer; said upper electrode fills said contact opening; and said conductive hydrogen barrier layer completely covers said contact opening.
Claim 26
Dependent Claim
23 words
A memory device as claimed in claim 24 , characterized in that: said conductive hydrogen barrier layer and said upper electrode are self-aligned.
Claim 27
Dependent Claim
28 words
A memory device as claimed in claim 1 , characterized in that: said upper electrode has a side surface; and said conductive hydrogen barrier covers said side surface.
Claim 28
Dependent Claim
36 words
A memory device as claimed in claim 1 , characterized in that: said capacitor has an upper surface and a side surface; and said conductive hydrogen barrier layer covers said upper surface and said side surface.
Claim 29
Dependent Claim
79 words
A memory device comprising: a capacitor, said capacitor having a lower electrode, a dielectric layer, and an upper electrode, said dielectric layer having an upper surface adjacent said upper electrode, a lower surface adjacent said lower electrode, and side surfaces between said upper and lower surfaces; a non-conductive nitride layer and a conductive metal nitride layer; and said non-conductive nitride layer and said conductive metal nitride layer together covering said side surfaces and said upper surface of said dielectric.
Claim 30
Dependent Claim
79 words
A memory device comprising: a capacitor, said capacitor having a lower electrode, a dielectric layer, and an upper electrode, said dielectric layer having an upper surface adjacent said upper electrode, a lower surface adjacent said lower electrode, and side surfaces between said upper and lower surfaces; a non-conductive nitride layer and a conductive metal nitride layer; and said non-conductive nitride layer and said conductive metal nitride layer together covering said side surfaces and said upper surface of said dielectric.
Claim 31
Dependent Claim
45 words
A memory device as in claim 28 wherein said non-conductive nitride layer covers said side walls and a portion of said upper surface, and said conductive metal nitride layer completely covers the remaining portion of said upper surface not covered by said non-conductive nitride layer.
Claim 32
Dependent Claim
41 words
A memory device as in claim 29 wherein said non-conductive and said conductive metal nitride layer are in contact so that said side surfaces and said upper surface are encapsulated by said non-conductive nitride layer and said conductive metal nitride layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-01-30 | 2004-07-31 | 2005-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-01-30 | 2008-07-31 | 2009-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-01-30 | 2012-07-31 | 2013-01-30 | $7700.00 | Window Closed / Lapsed |