US5406447A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Capacitor used in an integrated circuit and comprising opposing electrodes having barrier metal films in contact with a dielectric film
Assignee: Renesas Electronics Corp
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Filing: 1992-12-29
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Granted: 1995-04-11
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Expires: 2012-12-29
Abstract
Abstract On a first conductor layer of a capacitor element of an IC and in contact with a dielectric film made of a particular dielectric material, a first barrier metal film is made of platinum, palladium, tantalum, or titanium nitride. A second barrier metal film is made of a similar material in contact with the dielectric film and on a second conductor layer. The particular dielectric material is either tantalum oxide or a perovskite oxide, such as strontium titanate or a composite of lead zirconate and lead titanate. In cooperation with such a dielectric film, the first and the second barrier metal films make it possible to provide a compact capacitor having a great and reliable capacitance. The capacitor element is manufactured like a conventional one except for use of the particular dielectric material and for manufacturing steps of forming the first and the second barrier metal films and may be an MOS, MIS, or MIM capacitor or a multilayer wired capacitor.
Inventors
- 👤 Shinichi Miyazaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 12:56
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/682; H10D1/696; H10P; H10P14/00; H10P14/40; H10P14/418
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
277 words
A semiconductor device comprising: a semiconductor substrate, an insulating layer covering said semiconductor substrate, and a capacitor element formed on said insulating layer, said capacitor element including: a first electrically conductive layer formed on said insulating layer and having a top surface and a side surface, the top surface of said first electrically conductive layer having first and second portions, a first barrier metal formed on said first portion of the top surface of said first electrically conductive layer and having a top surface and a side surface, a dielectric film formed on the top surface of said first barrier metal and having a top surface and a side surface, an interlayer insulating film formed on and covering the side surface and the second portion of the top surface of said first electrically conductive layer, said interlayer insulating film being further formed on and covering the side surfaces of said first barrier metal and said dielectric film, said interlayer insulating film being elongated on a peripheral portion of the top surface of said dielectric film leaving a center portion of the top surface of said dielectric film exposed, a second barrier metal formed on said center portion of said dielectric film and elongated on said interlayer insulating film, a second electrically conductive layer formed on said second barrier metal, a contact hole selectively formed in said interlayer insulating film to expose a part of said second portion of the top surface of said first electrically conductive layer, and a third electrically conductive layer formed in contact with said part of said second portion of the top surface of said first electrically conductive layer through said contact hole.
Claim 2
Dependent Claim
277 words
A semiconductor device comprising: a semiconductor substrate, an insulating layer covering said semiconductor substrate, and a capacitor element formed on said insulating layer, said capacitor element including: a first electrically conductive layer formed on said insulating layer and having a top surface and a side surface, the top surface of said first electrically conductive layer having first and second portions, a first barrier metal formed on said first portion of the top surface of said first electrically conductive layer and having a top surface and a side surface, a dielectric film formed on the top surface of said first barrier metal and having a top surface and a side surface, an interlayer insulating film formed on and covering the side surface and the second portion of the top surface of said first electrically conductive layer, said interlayer insulating film being further formed on and covering the side surfaces of said first barrier metal and said dielectric film, said interlayer insulating film being elongated on a peripheral portion of the top surface of said dielectric film leaving a center portion of the top surface of said dielectric film exposed, a second barrier metal formed on said center portion of said dielectric film and elongated on said interlayer insulating film, a second electrically conductive layer formed on said second barrier metal, a contact hole selectively formed in said interlayer insulating film to expose a part of said second portion of the top surface of said first electrically conductive layer, and a third electrically conductive layer formed in contact with said part of said second portion of the top surface of said first electrically conductive layer through said contact hole.
Claim 3
Dependent Claim
45 words
The semiconductor device as claimed in claim 1, further comprising: a fourth electrically conductive layer buried in said insulating layer and a fifth electrically conductive layer selectively formed in said insulating layer to connect said fourth electrically conductive layer to said first electrically conductive layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-04-10 | 1998-10-10 | 1999-04-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-04-10 | 2002-10-10 | 2003-04-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-04-10 | 2006-10-10 | 2007-04-11 | $7700.00 | Window Closed / Lapsed |