Patent US6180494B1 successfully refreshed from Google Patents.
US6180494B1
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US
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Integrated circuitry, methods of fabricating integrated circuitry, methods of forming local interconnects, and methods of forming conductive lines
Assignee: Round Rock Research LLC
•
Filing: 1999-03-11
•
Granted: 2001-01-30
•
Expires: 2019-03-11
Abstract
Abstract A method of fabricating integrated circuitry comprises forming a conductive line having opposing sidewalls over a semiconductor substrate. An insulating layer is then deposited. The insulating layer is etched proximate the line along at least a portion of at least one sidewall of the line. An insulating spacer forming layer is then deposited over the substrate and the line. It is anisotropically etched to form an insulating sidewall spacer. A method of forming a local interconnect comprises forming at least two transistor gates over a semiconductor substrate. A local interconnect layer is deposited to overlie at least one of the transistor gates and interconnect at least one source/drain region of one of the gates with semiconductor substrate material proximate another of the transistor gates. In one aspect, a conductivity enhancing impurity is implanted into the local interconnect layer in at least two implanting steps, with one of the implantings providing a peak implant location which is deeper into the layer than the other. Conductivity enhancing impurity is diffused from the local interconnect layer into semiconductor substrate material therebeneath. In one aspect, conductivity enhancing impurity is implanted through the local interconnect layer into semiconductor substrate material therebeneath. Field isolation material regions and active area regions are formed on a semiconductor substrate. A trench is etched into the field isolation material into a desired line configuration. A conductive material is deposited to at least partially fill the trench and form a conductive line therein. Integrated circuitry is disclosed and claimed.
Inventors
- 👤 H. Montgomery Manning
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 17:45
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069; H10W20/0698; H10W20/071; H10W20/074; H10W20/076; H10W20/40; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 70
Claim 1
Independent Claim
146 words
A method of fabricating integrated circuitry comprising: forming a conductive line having opposing sidewalls over a semiconductor substrate; depositing an insulating layer over the substrate and the line; etching the insulating layer proximate the line along at least a portion of at least one sidewall of the line; after the etching, depositing an insulating spacer forming layer over the substrate and the line, and anisotropically etching it to form an insulating sidewall spacer along said portion of the at least one sidewall; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench and which electrically connects with one of the active area regions.
Claim 2
Independent Claim
146 words
A method of fabricating integrated circuitry comprising: forming a conductive line having opposing sidewalls over a semiconductor substrate; depositing an insulating layer over the substrate and the line; etching the insulating layer proximate the line along at least a portion of at least one sidewall of the line; after the etching, depositing an insulating spacer forming layer over the substrate and the line, and anisotropically etching it to form an insulating sidewall spacer along said portion of the at least one sidewall; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench and which electrically connects with one of the active area regions.
Claim 3
Dependent Claim
23 words
The method of claim 1 wherein the forming of the local interconnect layer of material overfills the trench with such interconnect layer material.
Claim 4
Dependent Claim
48 words
The method of claim 1 wherein the local interconnect layer of material is initially formed by depositing to overfill the trench, and comprising removing some of the local interconnect layer of material after the initial deposition to leave the trench only partially filled with such interconnect layer material.
Claim 5
Dependent Claim
29 words
The method of claim 1 wherein the trench etching comprises forming the trench to have opposing sidewalls having some opposing portions thereof which are substantially parallel with one another.
Claim 6
Dependent Claim
33 words
The method of claim 4 wherein the opposing sidewalls extend to a trench base extending between the sidewalls, the trench base including a portion which is substantially perpendicular to the sidewall opposing portions.
Claim 7
Dependent Claim
19 words
The method of claim 4 wherein the sidewall opposing portions extend to a trench base extending between the sidewalls.
Claim 8
Dependent Claim
37 words
The method of claim 1 wherein the trench etching comprises forming the trench to have opposing sidewalls which extend from an outer surface of the field isolation material substantially parallel with one another to a trench base.
Claim 9
Independent Claim
181 words
A method of fabricating integrated circuitry comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate, one sidewall of one of the transistor gates facing one sidewall of the other transistor gate; depositing an insulating layer over the substrate and between the pair of transistor gates to fill an area extending therebetween; etching a contact opening into the insulating layer to proximate the substrate between the pair of transistor gates; depositing an insulating spacer forming layer within the contact opening to less than completely fill the contact opening; anisotropically etching the spacer forming layer to form a pair of insulating sidewall spacers over the one sidewalls of the pair of transistor gates; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench and which electrically connects with one of the active area regions.
Claim 10
Independent Claim
181 words
A method of fabricating integrated circuitry comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate, one sidewall of one of the transistor gates facing one sidewall of the other transistor gate; depositing an insulating layer over the substrate and between the pair of transistor gates to fill an area extending therebetween; etching a contact opening into the insulating layer to proximate the substrate between the pair of transistor gates; depositing an insulating spacer forming layer within the contact opening to less than completely fill the contact opening; anisotropically etching the spacer forming layer to form a pair of insulating sidewall spacers over the one sidewalls of the pair of transistor gates; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench and which electrically connects with one of the active area regions.
Claim 11
Dependent Claim
23 words
The method of claim 8 wherein the forming of the local interconnect layer of material overfills the trench with such interconnect layer material.
Claim 12
Dependent Claim
48 words
The method of claim 8 wherein the local interconnect layer of material is initially formed by depositing to overfill the trench, and comprising removing some of the local interconnect layer of material after the initial deposition to leave the trench only partially filled with such interconnect layer material.
Claim 13
Dependent Claim
29 words
The method of claim 8 wherein the trench etching comprises forming the trench to have opposite sidewalls having some opposing portions thereof which are substantially parallel with one another.
Claim 14
Dependent Claim
33 words
The method of claim 11 wherein the opposing sidewalls extend to a trench base extending between the sidewalls, the trench base including a portion which is substantially perpendicular to the sidewall opposing portions.
Claim 15
Dependent Claim
19 words
The method of claim 11 wherein the sidewall opposing portions extend to a trench base extending between the sidewalls.
Claim 16
Dependent Claim
37 words
The method of claim 8 wherein the trench etching comprises forming the trench to have opposing sidewalls which extend from an outer surface of the field isolation material substantially parallel with one another to a trench base.
Claim 17
Independent Claim
189 words
A method of fabricating integrated circuitry comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate, one sidewall of one of the transistor gates facing one sidewall of the other transistor gate; depositing an insulating layer over the substrate and between the pair of transistor gates to fill an area extending therebetween; etching a contact opening into the insulating layer to proximate the substrate between the pair of transistor gates, the etching exposing conductive material of at least one of the one sidewalls of the pair of transistor gates; after the etching, covering the at least one of the one sidewalls with insulating material; forming electrically conductive material within the opening in electrical connection with material of the semiconductor substrate; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench and which electrically connects with one of the active area regions.
Claim 18
Independent Claim
189 words
A method of fabricating integrated circuitry comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate, one sidewall of one of the transistor gates facing one sidewall of the other transistor gate; depositing an insulating layer over the substrate and between the pair of transistor gates to fill an area extending therebetween; etching a contact opening into the insulating layer to proximate the substrate between the pair of transistor gates, the etching exposing conductive material of at least one of the one sidewalls of the pair of transistor gates; after the etching, covering the at least one of the one sidewalls with insulating material; forming electrically conductive material within the opening in electrical connection with material of the semiconductor substrate; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench and which electrically connects with one of the active area regions.
Claim 19
Dependent Claim
23 words
The method of claim 15 wherein the forming of the local interconnect layer of material overfills the trench with such interconnect layer material.
Claim 20
Dependent Claim
48 words
The method of claim 15 wherein the local interconnect layer of material is initially formed by depositing to overfill the trench, and comprising removing some of the local interconnect layer of material after the initial deposition to leave the trench only partially filled with such interconnect layer material.
Claim 21
Dependent Claim
29 words
The method of claim 15 wherein the trench etching comprises forming the trench to have opposing sidewalls having some opposing portions thereof which are substantially parallel with one another.
Claim 22
Dependent Claim
33 words
The method of claim 18 wherein the opposing sidewalls extend to a trench base extending between the sidewalls, the trench base including a portion which is substantially perpendicular to the sidewall opposing portions.
Claim 23
Dependent Claim
19 words
The method of claim 18 wherein the sidewall opposing portions extend to a trench base extending between the sidewalls.
Claim 24
Dependent Claim
37 words
The method of claim 15 wherein the trench etching comprises forming the trench to have opposing sidewalls which extend from an outer surface of the field isolation material substantially parallel with one another to a trench base.
Claim 25
Independent Claim
206 words
A method of forming a local interconnect comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate; depositing an insulating layer over the substrate and between the pair of transistor gates; etching a first contact opening into the insulating layer to proximate the substrate between the pair of transistor gates and another contact opening through the insulating layer to proximate the substrate proximate an opposing side of one of the pair of transistor gates; forming insulating sidewall spacers over the opposing sidewalls of the one transistor gate, the insulating layer being received between at least one of said sidewalls and one of said sidewall spacers; forming a local interconnect layer to overlie the one transistor gate and electrically connect with semiconductor substrate material between the pair of transistor gates and semiconductor substrate material proximate the opposing side of the one transistor gate; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming the local interconnect layer to at least partially fill the trench and which electrically connects with one of the active area regions.
Claim 26
Independent Claim
206 words
A method of forming a local interconnect comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate; depositing an insulating layer over the substrate and between the pair of transistor gates; etching a first contact opening into the insulating layer to proximate the substrate between the pair of transistor gates and another contact opening through the insulating layer to proximate the substrate proximate an opposing side of one of the pair of transistor gates; forming insulating sidewall spacers over the opposing sidewalls of the one transistor gate, the insulating layer being received between at least one of said sidewalls and one of said sidewall spacers; forming a local interconnect layer to overlie the one transistor gate and electrically connect with semiconductor substrate material between the pair of transistor gates and semiconductor substrate material proximate the opposing side of the one transistor gate; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming the local interconnect layer to at least partially fill the trench and which electrically connects with one of the active area regions.
Claim 27
Dependent Claim
23 words
The method of claim 22 wherein the forming of the local interconnect layer of material overfills the trench with such interconnect layer material.
Claim 28
Dependent Claim
48 words
The method of claim 22 wherein the local interconnect layer of material is initially formed by depositing to overfill the trench, and comprising removing some of the local interconnect layer of material after the initial deposition to leave the trench only partially filled with such interconnect layer material.
Claim 29
Dependent Claim
29 words
The method of claim 22 wherein the trench etching comprises forming the trench to have opposing sidewalls having some opposing portions thereof which are substantially parallel with one another.
Claim 30
Dependent Claim
33 words
The method of claim 25 wherein the opposing sidewalls extend to a trench base extending between the sidewalls, the trench base including a portion which is substantially perpendicular to the sidewall opposing portions.
Claim 31
Dependent Claim
19 words
The method of claim 25 wherein the sidewall opposing portions extend to a trench base extending between the sidewalls.
Claim 32
Dependent Claim
37 words
The method of claim 22 wherein the trench etching comprises forming the trench to have opposing sidewalls which extend from an outer surface of the field isolation material substantially parallel with one another to a trench base.
Claim 33
Independent Claim
52 words
A method of forming a conductive line comprising: forming field isolation material regions and active area regions on a semiconductor substrate; etching a trench into the field isolation material into a desired line configuration; and depositing a conductive material to at least partially fill the trench and form a conductive line therein.
Claim 34
Independent Claim
52 words
A method of forming a conductive line comprising: forming field isolation material regions and active area regions on a semiconductor substrate; etching a trench into the field isolation material into a desired line configuration; and depositing a conductive material to at least partially fill the trench and form a conductive line therein.
Claim 35
Dependent Claim
15 words
The method of claim 29 comprising forming the field isolation material to comprise LOCOS oxide.
Claim 36
Dependent Claim
27 words
The method of claim 29 comprising depositing an insulative layer over the active area and field isolation regions, and planarizing the insulative layer prior to the etching.
Claim 37
Dependent Claim
41 words
The method of claim 29 comprising depositing an insulative layer over the active area and field isolation regions, and planarizing the insulative layer prior to the etching; the etching comprising etching the trench to be received within the planarized insulative layer.
Claim 38
Dependent Claim
20 words
The method of claim 29 comprising forming the field isolation material to comprise CVD oxide formed within etched substrate trenches.
Claim 39
Dependent Claim
39 words
The method of claim 29 wherein the conductive material is initially deposited to overfill the trench, and comprising removing some of the conductive material after the initial deposition to leave the trench only partially filled with the conductive material.
Claim 40
Dependent Claim
15 words
The method of claim 29 wherein the conductive material is deposited to overfill the trench.
Claim 41
Dependent Claim
29 words
The method of claim 29 wherein the trench etching comprises forming the trench to have opposing sidewalls having some opposing portions thereof which are substantially parallel with one another.
Claim 42
Dependent Claim
33 words
The method of claim 36 wherein the opposing sidewalls extend to a trench base extending between the sidewalls, the trench base including a portion which is substantially perpendicular to the sidewall opposing portions.
Claim 43
Dependent Claim
19 words
The method of claim 36 wherein the sidewall opposing portions extend to a trench base extending between the sidewalls.
Claim 44
Dependent Claim
37 words
The method of claim 29 wherein the trench etching comprises forming the trench to have opposing sidewalls which extend from an outer surface of the field isolation material substantially parallel with one another to a trench base.
Claim 45
Independent Claim
69 words
A method of forming a local interconnect comprising: etching a trench into field isolation material formed relative to a semiconductor substrate, the trench in the field isolation material extending to an edge of the isolation material proximate active area substrate material; and forming a local interconnect layer of material over the substrate which at least partially fills the trench and which electrically connects with said active area substrate material.
Claim 46
Independent Claim
69 words
A method of forming a local interconnect comprising: etching a trench into field isolation material formed relative to a semiconductor substrate, the trench in the field isolation material extending to an edge of the isolation material proximate active area substrate material; and forming a local interconnect layer of material over the substrate which at least partially fills the trench and which electrically connects with said active area substrate material.
Claim 47
Dependent Claim
15 words
The method of claim 40 comprising forming the field isolation material to comprise LOCOS oxide.
Claim 48
Dependent Claim
20 words
The method of claim 40 comprising forming the field isolation material to comprise CVD oxide formed within etched substrate trenches.
Claim 49
Dependent Claim
40 words
The method of claim 40 wherein the local interconnect layer is initially deposited to overfill the trench, and comprising removing some of the interconnect layer after the initial deposition to leave the trench only partially filled with the interconnect layer.
Claim 50
Dependent Claim
15 words
The method of claim 40 wherein the conductive material is deposited to overfill the trench.
Claim 51
Dependent Claim
29 words
The method of claim 40 wherein the trench etching comprises forming the trench to have opposing sidewalls having some opposing portions thereof which are substantially parallel with one another.
Claim 52
Dependent Claim
33 words
The method of claim 45 wherein the opposing sidewalls extend to at trench base extending between the sidewalls, the trench base including a portion which is substantially perpendicular to the sidewall opposing portions.
Claim 53
Dependent Claim
19 words
The method of claim 45 wherein the sidewall opposing portions extend to a trench base extending between the sidewalls.
Claim 54
Dependent Claim
37 words
The method of claim 40 wherein the trench etching comprises forming the trench to have opposing sidewalls which extend from an outer surface of the field isolation material substantially parallel with one another to a trench base.
Claim 55
Independent Claim
135 words
A method of fabricating integrated circuitry comprising: forming a conductive line having opposing sidewalls over a semiconductor substrate; depositing an insulating layer over the substrate and the line; etching the insulating layer proximate the line along at least a portion of at least one sidewall of the line; after the etching, depositing an insulating spacer forming layer over the substrate and the line, and anisotropically etching it to form an insulating sidewall spacer along said portion of the at least one sidewall; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench.
Claim 56
Independent Claim
135 words
A method of fabricating integrated circuitry comprising: forming a conductive line having opposing sidewalls over a semiconductor substrate; depositing an insulating layer over the substrate and the line; etching the insulating layer proximate the line along at least a portion of at least one sidewall of the line; after the etching, depositing an insulating spacer forming layer over the substrate and the line, and anisotropically etching it to form an insulating sidewall spacer along said portion of the at least one sidewall; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench.
Claim 57
Dependent Claim
23 words
The method of claim 49 wherein the forming of the local interconnect layer of material overfills the trench with such interconnect layer material.
Claim 58
Dependent Claim
48 words
The method of claim 49 wherein the local interconnect layer of material is initially formed by depositing to overfill the trench, and comprising removing some of the local interconnect layer of material after the initial deposition to leave the trench only partially filled with such interconnect layer material.
Claim 59
Independent Claim
170 words
A method of fabricating integrated circuitry comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate, one sidewall of one of the transistor gates facing one sidewall of the other transistor gate; depositing an insulating layer over the substrate and between the pair of transistor gates to fill an area extending therebetween; etching a contact opening into the insulating layer to proximate the substrate between the pair of transistor gates; depositing an insulating spacer forming layer within the contact opening to less than completely fill the contact opening; anisotropically etching the spacer forming layer to form a pair of insulting sidewall spacers over the one sidewalls of the pair of transistor gates; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into a field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench.
Claim 60
Independent Claim
170 words
A method of fabricating integrated circuitry comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate, one sidewall of one of the transistor gates facing one sidewall of the other transistor gate; depositing an insulating layer over the substrate and between the pair of transistor gates to fill an area extending therebetween; etching a contact opening into the insulating layer to proximate the substrate between the pair of transistor gates; depositing an insulating spacer forming layer within the contact opening to less than completely fill the contact opening; anisotropically etching the spacer forming layer to form a pair of insulting sidewall spacers over the one sidewalls of the pair of transistor gates; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into a field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench.
Claim 61
Dependent Claim
23 words
The method of claim 52 wherein the forming of the local interconnect layer of material overfills the trench with such interconnect layer material.
Claim 62
Dependent Claim
48 words
The method of claim 52 wherein the local interconnect layer of material is initially formed by depositing to overfill the trench, and comprising removing some of the local interconnect layer of material after the initial deposition to leave the trench only partially filled with such interconnect layer material.
Claim 63
Independent Claim
178 words
A method of fabricating integrated circuitry comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate, one sidewall of one of the transistor gates facing one sidewall of the other transistor gate; depositing an insulating layer over the substrate and between the pair of transistor gates to fill an area extending therebetween; etching a contact opening into the insulating layer to proximate the substrate between the pair of transistor gates, the etching exposing conductive material of at least one of the one sidewalls of the pair of transistor gates; after the etching, covering the at least one of the one sidewalls with insulating material; forming electrically conductive material within the opening in electrical connection with material of the semiconductor substrate; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench.
Claim 64
Independent Claim
178 words
A method of fabricating integrated circuitry comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate, one sidewall of one of the transistor gates facing one sidewall of the other transistor gate; depositing an insulating layer over the substrate and between the pair of transistor gates to fill an area extending therebetween; etching a contact opening into the insulating layer to proximate the substrate between the pair of transistor gates, the etching exposing conductive material of at least one of the one sidewalls of the pair of transistor gates; after the etching, covering the at least one of the one sidewalls with insulating material; forming electrically conductive material within the opening in electrical connection with material of the semiconductor substrate; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming a local interconnect layer of material over the substrate which at least partially fills the trench.
Claim 65
Dependent Claim
23 words
The method of claim 55 wherein the forming of the local interconnect layer of material overfills the trench with such interconnect layer material.
Claim 66
Dependent Claim
48 words
The method of claim 55 wherein the local interconnect layer of material is initially formed by depositing to overfill the trench, and comprising removing some of the local interconnect layer of material after the initial deposition to leave the trench only partially filled with such interconnect layer material.
Claim 67
Independent Claim
195 words
A method of forming a local interconnect comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate; depositing an insulating layer over the substrate and between the pair of transistor gates; etching a first contact opening into the insulating layer to proximate the substrate between the pair of transistor gates and another contact opening through the insulating layer to proximate the substrate proximate an opposing side of one of the pair of transistor gates; forming insulating sidewall spacers over the opposing sidewalls of the one transistor gate, the insulating layer being received between at least one of said sidewalls and one of said sidewall spacers; forming a local interconnect layer to overlie the one transistor gate and electrically connect with semiconductor substrate material between the pair of transistor gates and semiconductor substrate material proximate the opposing side of the one transistor gate; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming the local interconnect layer to at least partially fill the trench.
Claim 68
Independent Claim
195 words
A method of forming a local interconnect comprising: forming a pair of transistor gates having respective opposing sidewalls over a semiconductor substrate; depositing an insulating layer over the substrate and between the pair of transistor gates; etching a first contact opening into the insulating layer to proximate the substrate between the pair of transistor gates and another contact opening through the insulating layer to proximate the substrate proximate an opposing side of one of the pair of transistor gates; forming insulating sidewall spacers over the opposing sidewalls of the one transistor gate, the insulating layer being received between at least one of said sidewalls and one of said sidewall spacers; forming a local interconnect layer to overlie the one transistor gate and electrically connect with semiconductor substrate material between the pair of transistor gates and semiconductor substrate material proximate the opposing side of the one transistor gate; forming field isolation material regions and active area regions on the semiconductor substrate before the depositing; etching a trench into the field isolation material and the insulating layer into a desired local interconnect line configuration; and forming the local interconnect layer to at least partially fill the trench.
Claim 69
Dependent Claim
23 words
The method of claim 58 wherein the forming of the local interconnect layer of material overfills the trench with such interconnect layer material.
Claim 70
Dependent Claim
48 words
The method of claim 58 wherein the local interconnect layer of material is initially formed by depositing to overfill the trench, and comprising removing some of the local interconnect layer of material after the initial deposition to leave the trench only partially filled with such interconnect layer material.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-01-30 | 2004-07-31 | 2005-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-01-30 | 2008-07-31 | 2009-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-01-30 | 2012-07-31 | 2013-01-30 | $7700.00 | Window Closed / Lapsed |