Method of forming trench isolation region for semiconductor device

Claim 1

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a semiconductor substrate with a stack structure formed thereon, the stack structure including a pad oxide layer formed over the semiconductor and beneath a layer of oxides of silicon; forming a vertical slot with a pair of sidewalls in the stack structure, the slot having a first width between the sidewalls; forming spacers along the sidewalls of the slot; and forming a trench in the substrate below the slot while simultaneously removing the spacers, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a rounded profile adjacent to the sidewalls of the slot.

Claim 2

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a semiconductor substrate with a stack structure formed thereon, the stack structure including a pad oxide layer formed over the semiconductor and beneath a layer of oxides of silicon; forming a vertical slot with a pair of sidewalls in the stack structure, the slot having a first width between the sidewalls; forming spacers along the sidewalls of the slot; and forming a trench in the substrate below the slot while simultaneously removing the spacers, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a rounded profile adjacent to the sidewalls of the slot.

Claim 14

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a layer of oxides of silicon, wherein the layer of oxides of silicon is composed of silicon dioxide formed by a decomposition of a material selected from the group consisting of tetra ethyl orthosilicate, low silane oxide, and combinations thereof; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure, the slot having a first width between the sidewalls; depositing a polysilicon layer over the stack structure and the vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; and etching a trench in the substrate below the slot while simultaneously removing the spacers such that the shape of the spacers is transferred into the trench, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile.

Claim 15

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a layer of oxides of silicon, wherein the layer of oxides of silicon is composed of silicon dioxide formed by a decomposition of a material selected from the group consisting of tetra ethyl orthosilicate, low silane oxide, and combinations thereof; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure, the slot having a first width between the sidewalls; depositing a polysilicon layer over the stack structure and the vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; and etching a trench in the substrate below the slot while simultaneously removing the spacers such that the shape of the spacers is transferred into the trench, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile.

Claim 22

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a pad oxide layer formed over the substrate, a silicon nitride layer formed over the pad oxide layer, and a layer of oxides of silicon formed over the silicon nitride layer, wherein the layer of oxides of silicon is composed of silicon dioxide formed by a decomposition of a material selected from the group consisting of tetra ethyl orthosilicate, low silane oxide, and combinations thereof; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure, the slot having a first width between the sidewalls; depositing a polysilicon layer over the stack structure and the vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; and etching a trench in the substrate below the slot while simultaneously removing the spacers such that the shape of the spacers is transferred into the trench, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile.

Claim 23

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a pad oxide layer formed over the substrate, a silicon nitride layer formed over the pad oxide layer, and a layer of oxides of silicon formed over the silicon nitride layer, wherein the layer of oxides of silicon is composed of silicon dioxide formed by a decomposition of a material selected from the group consisting of tetra ethyl orthosilicate, low silane oxide, and combinations thereof; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure, the slot having a first width between the sidewalls; depositing a polysilicon layer over the stack structure and the vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; and etching a trench in the substrate below the slot while simultaneously removing the spacers such that the shape of the spacers is transferred into the trench, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile.

Claim 30

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a layer of oxides of silicon, wherein the layer of oxides of silicon is composed of silicon dioxide formed by a decomposition of a material selected from the group consisting of tetra ethyl orthosilicate, low silane oxide, and combinations thereof; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure; depositing a polysilicon layer over the stack structure and vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; etching a trench in the substrate below the slot while simultaneously removing the spacers, the trench defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; depositing an oxide filler material in the trench and over the stack structure to form a covering layer; and polishing the covering layer and the stack structure to form a filled trench region which electrically isolates active areas in the substrate.

Claim 31

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a layer of oxides of silicon, wherein the layer of oxides of silicon is composed of silicon dioxide formed by a decomposition of a material selected from the group consisting of tetra ethyl orthosilicate, low silane oxide, and combinations thereof; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure; depositing a polysilicon layer over the stack structure and vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; etching a trench in the substrate below the slot while simultaneously removing the spacers, the trench defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; depositing an oxide filler material in the trench and over the stack structure to form a covering layer; and polishing the covering layer and the stack structure to form a filled trench region which electrically isolates active areas in the substrate.

Claim 36

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a pad oxide layer formed over the substrate, a silicon nitride layer formed over the pad oxide layer, and a layer of oxides of silicon formed over the silicon nitride layer, wherein the layer of oxides of silicon is composed of silicon dioxide formed by a decomposition of a material selected from the group consisting of tetra ethyl orthosilicate, low silane oxide, and combinations thereof; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure; depositing a polysilicon layer over the stack structure and vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; etching a trench in the substrate below the slot while simultaneously removing the spacers, the trench defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; forming an oxide liner on a surface of the trench; depositing an oxide filler material in the trench and over the stack structure to form a covering layer; and polishing the covering layer and the stack structure to form a filled trench region which electrically isolates active areas in the substrate.

Claim 37

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a pad oxide layer formed over the substrate, a silicon nitride layer formed over the pad oxide layer, and a layer of oxides of silicon formed over the silicon nitride layer, wherein the layer of oxides of silicon is composed of silicon dioxide formed by a decomposition of a material selected from the group consisting of tetra ethyl orthosilicate, low silane oxide, and combinations thereof; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure; depositing a polysilicon layer over the stack structure and vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; etching a trench in the substrate below the slot while simultaneously removing the spacers, the trench defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; forming an oxide liner on a surface of the trench; depositing an oxide filler material in the trench and over the stack structure to form a covering layer; and polishing the covering layer and the stack structure to form a filled trench region which electrically isolates active areas in the substrate.

Claim 41

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a semiconductor substrate with a stack structure formed thereon; forming a vertical slot with a pair of sidewalls in the stack structure, the slot having a first width between the sidewalls; forming spacers along the sidewalls of the slot; forming a trench in the substrate below the slot while simultaneously removing the spacers, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a rounded profile adjacent to the sidewalls of the slot; and depositing an oxide filler material in the trench and over the stack structure to form a covering layer, wherein the oxide filler material is formed from a high density plasma oxide comprising tetra ethyl orthosilicate.

Claim 42

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a semiconductor substrate with a stack structure formed thereon; forming a vertical slot with a pair of sidewalls in the stack structure, the slot having a first width between the sidewalls; forming spacers along the sidewalls of the slot; forming a trench in the substrate below the slot while simultaneously removing the spacers, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a rounded profile adjacent to the sidewalls of the slot; and depositing an oxide filler material in the trench and over the stack structure to form a covering layer, wherein the oxide filler material is formed from a high density plasma oxide comprising tetra ethyl orthosilicate.

Claim 43

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a layer of oxides of silicon; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure, the slot having a first width between the sidewalls; depositing a polysilicon layer over the stack structure and the vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; etching a trench in the substrate below the slot while simultaneously removing the spacers such that the shape of the spacers is transferred into the trench, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; and depositing an oxide filler material in the trench and over the stack structure to form a covering layer, wherein the oxide filler material is formed from a high density plasma oxide comprising tetra ethyl orthosilicate.

Claim 44

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a layer of oxides of silicon; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure, the slot having a first width between the sidewalls; depositing a polysilicon layer over the stack structure and the vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; etching a trench in the substrate below the slot while simultaneously removing the spacers such that the shape of the spacers is transferred into the trench, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; and depositing an oxide filler material in the trench and over the stack structure to form a covering layer, wherein the oxide filler material is formed from a high density plasma oxide comprising tetra ethyl orthosilicate.

Claim 46

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a pad oxide layer formed over the substrate, a silicon nitride layer formed over the pad oxide layer, and a layer of oxides of silicon formed over the silicon nitride layer; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure, the slot having a first width between the sidewalls; depositing a polysilicon layer over the stack structure and the vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; etching a trench in the substrate below the slot while simultaneously removing the spacers such that the shape of the spacers is transferred into the trench, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; and depositing an oxide filler material in the trench and over the stack structure to form a covering layer, wherein the oxide filler material is formed from a high density plasma oxide comprising tetra ethyl orthosilicate.

Claim 47

A method of forming a trench isolation region in a semiconductor device, the method comprising: providing a silicon substrate with a stack structure formed thereon comprising a pad oxide layer formed over the substrate, a silicon nitride layer formed over the pad oxide layer, and a layer of oxides of silicon formed over the silicon nitride layer; forming a vertical slot with sidewalls in the stack structure from a patterned photoresist layer on the stack structure, the slot having a first width between the sidewalls; depositing a polysilicon layer over the stack structure and the vertical slot; etching the polysilicon layer to form polysilicon spacers with a curved shape along the sidewalls of the slot; etching a trench in the substrate below the slot while simultaneously removing the spacers such that the shape of the spacers is transferred into the trench, the trench having a second width which is less than the first width of the slot, the trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; and depositing an oxide filler material in the trench and over the stack structure to form a covering layer, wherein the oxide filler material is formed from a high density plasma oxide comprising tetra ethyl orthosilicate.

Claim 49

A method of forming a trench isolation structure formed in a semiconductor device, the method comprising: providing a semiconductor substrate having an upper surface; forming a plurality of trenches in the semiconductor substrate, each said trench: being defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls; having a pair of upper corners with a convex profile; and having the upper corners thereof joining the sidewalls thereof with the upper surface of the semiconductor substrate; forming a plurality of islands, each said island being situated upon the upper surface of the semiconductor substrate between two trenches of said plurality of trenches and comprising: a first dielectric layer upon the upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and third dielectric layer having a composition different than and being situated upon the second dielectric layer; forming a fourth dielectric layer having a composition different than the second dielectric layer, having a top planar surface being situated upon said plurality of islands, and filling said plurality of trenches.

Claim 50

A method of forming a trench isolation structure formed in a semiconductor device, the method comprising: providing a semiconductor substrate having an upper surface; forming a plurality of trenches in the semiconductor substrate, each said trench: being defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls; having a pair of upper corners with a convex profile; and having the upper corners thereof joining the sidewalls thereof with the upper surface of the semiconductor substrate; forming a plurality of islands, each said island being situated upon the upper surface of the semiconductor substrate between two trenches of said plurality of trenches and comprising: a first dielectric layer upon the upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and third dielectric layer having a composition different than and being situated upon the second dielectric layer; forming a fourth dielectric layer having a composition different than the second dielectric layer, having a top planar surface being situated upon said plurality of islands, and filling said plurality of trenches.

Claim 54

A method of forming a trench isolation structure formed in a semiconductor device, the method comprising: providing a semiconductor substrate having an upper surface; forming a plurality of trenches in the semiconductor substrate, each said trench: being defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls; having a pair of lower corners with a concave profile; and having the lower corners thereof joining the sidewalls with the bottom wall thereof; forming a plurality of islands, each said island being situated upon the upper surface of the semiconductor substrate between two trenches of said plurality of trenches and comprising: a first dielectric layer upon the upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a composition different than and being situated upon the second dielectric layer; a fourth dielectric layer having a composition different than the second dielectric layer, having a top planar surface, being situated upon said plurality of islands, and filling said plurality of trenches.

Claim 55

A method of forming a trench isolation structure formed in a semiconductor device, the method comprising: providing a semiconductor substrate having an upper surface; forming a plurality of trenches in the semiconductor substrate, each said trench: being defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls; having a pair of lower corners with a concave profile; and having the lower corners thereof joining the sidewalls with the bottom wall thereof; forming a plurality of islands, each said island being situated upon the upper surface of the semiconductor substrate between two trenches of said plurality of trenches and comprising: a first dielectric layer upon the upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a composition different than and being situated upon the second dielectric layer; a fourth dielectric layer having a composition different than the second dielectric layer, having a top planar surface, being situated upon said plurality of islands, and filling said plurality of trenches.

Claim 59

A method of forming a trench isolation structure for electrically isolating active areas in a semiconductor device, the method comprising: providing a semiconductor substrate having a planar upper surface; forming a plurality of trenches in the semiconductor substrate, each said trench: being defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls; having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; having the upper corners thereof joining the sidewalls thereof with the upper surface of the semiconductor substrate; and having the lower corners thereof joining the sidewalls with the bottom wall thereof; forming a plurality of islands, each said island being situated upon the planar upper surface of the semiconductor substrate between two trenches of said plurality of trenches and comprising: a first dielectric layer upon the upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a composition different than and being situated upon the second dielectric layer; forming a fourth dielectric layer having a composition different than the second dielectric layer, having a top planar surface, being situated upon said plurality of islands, and filling said plurality of trenches.

Claim 60

A method of forming a trench isolation structure for electrically isolating active areas in a semiconductor device, the method comprising: providing a semiconductor substrate having a planar upper surface; forming a plurality of trenches in the semiconductor substrate, each said trench: being defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls; having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; having the upper corners thereof joining the sidewalls thereof with the upper surface of the semiconductor substrate; and having the lower corners thereof joining the sidewalls with the bottom wall thereof; forming a plurality of islands, each said island being situated upon the planar upper surface of the semiconductor substrate between two trenches of said plurality of trenches and comprising: a first dielectric layer upon the upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a composition different than and being situated upon the second dielectric layer; forming a fourth dielectric layer having a composition different than the second dielectric layer, having a top planar surface, being situated upon said plurality of islands, and filling said plurality of trenches.

Claim 62

A method of forming a semiconductor device having trench isolation structures for electrically isolating active areas in the semiconductor device, the method comprising: providing a semiconductor substrate having a planar upper surface; forming a plurality of trenches in the semiconductor substrate, each said trench being defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls, each said trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile, the upper corners of each trench joining the sidewalls of the trench with the upper surface of the semiconductor substrate, and the lower corners of each trench joining the sidewalls with the bottom wall of the trench; forming a plurality of islands, each said island being situated upon the planar upper surface of the semiconductor substrate between two trenches of said plurality of trenches and comprising: a first dielectric layer upon the upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a composition different than and being situated upon the second dielectric layer; forming an oxide filler material in each trench, upon each island, and having a top planar surface over each said trench that is above the planar upper surface of the semiconductor substrate.

Claim 63

A method of forming a semiconductor device having trench isolation structures for electrically isolating active areas in the semiconductor device, the method comprising: providing a semiconductor substrate having a planar upper surface; forming a plurality of trenches in the semiconductor substrate, each said trench being defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls, each said trench having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile, the upper corners of each trench joining the sidewalls of the trench with the upper surface of the semiconductor substrate, and the lower corners of each trench joining the sidewalls with the bottom wall of the trench; forming a plurality of islands, each said island being situated upon the planar upper surface of the semiconductor substrate between two trenches of said plurality of trenches and comprising: a first dielectric layer upon the upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a composition different than and being situated upon the second dielectric layer; forming an oxide filler material in each trench, upon each island, and having a top planar surface over each said trench that is above the planar upper surface of the semiconductor substrate.

Claim 64

A method of forming an isolation structure, the method comprising: providing a semiconductor substrate having a plurality of active areas therein; forming a plurality of trenches in the semiconductor substrate, each said trench: being in between a pair of active areas and defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls; having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; and having an oxide liner on a surface thereof; forming a plurality of islands, each said island being situated upon a planar upper surface of the semiconductor substrate between two trenches of said plurality of trenches and comprising: a first dielectric layer upon the planar upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a composition different than and being situated upon the second dielectric layer; forming a covering layer, composed of an electrically insulative material, filling each said trench, covering each said island, and having a planar top surface, wherein each said trench electrically isolates a respective pair of said active areas.

Claim 65

A method of forming an isolation structure, the method comprising: providing a semiconductor substrate having a plurality of active areas therein; forming a plurality of trenches in the semiconductor substrate, each said trench: being in between a pair of active areas and defined by a pair of sidewalls and a bottom wall that is perpendicular to the sidewalls; having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; and having an oxide liner on a surface thereof; forming a plurality of islands, each said island being situated upon a planar upper surface of the semiconductor substrate between two trenches of said plurality of trenches and comprising: a first dielectric layer upon the planar upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a composition different than and being situated upon the second dielectric layer; forming a covering layer, composed of an electrically insulative material, filling each said trench, covering each said island, and having a planar top surface, wherein each said trench electrically isolates a respective pair of said active areas.

Claim 68

A method for forming an isolation structure, the method comprising: providing a semiconductor substrate; forming a plurality of trenches in the semiconductor substrate each having a width, a pair of convex profiled upper corners, and a pair of concave profiled lower corners; forming a plurality of islands each: being situated between two of said trenches; being separated from a respective adjacent island by a distance that is greater than the width of each said trench; and comprising: a first dielectric layer upon the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a composition different than and being situated upon the second dielectric layer; forming an electrically insulative layer filling each said trench, contacting each said island, and having a planar top surface.

Claim 69

A method for forming an isolation structure, the method comprising: providing a semiconductor substrate; forming a plurality of trenches in the semiconductor substrate each having a width, a pair of convex profiled upper corners, and a pair of concave profiled lower corners; forming a plurality of islands each: being situated between two of said trenches; being separated from a respective adjacent island by a distance that is greater than the width of each said trench; and comprising: a first dielectric layer upon the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a composition different than and being situated upon the second dielectric layer; forming an electrically insulative layer filling each said trench, contacting each said island, and having a planar top surface.

Claim 70

A method for forming an isolation structure, the method comprising: providing a semiconductor substrate having a planar upper surface and a plurality of active areas therein; forming a plurality of trenches in the semiconductor substrate, each said trench: being in between a respective pair of active areas and defined by a pair of sidewalls with a width therebetween and a bottom wall that is perpendicular to said sidewalls; having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; and having an oxide liner on a surface thereof; forming a plurality of islands, each said island being situated upon the planar upper surface of the semiconductor substrate between two respective trenches of said plurality of trenches and being separated from a respective adjacent island by a distance that is greater than the width between the sidewalls of each said trench, each said island comprising: a first dielectric layer upon the planar upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a planar top surface and having a composition different than and being situated upon the second dielectric layer; forming a covering layer, composed of an electrically insulative material, filling each said trench, covering each said island, and having a planar top surface, wherein each said trench electrically isolates the respective pair of active areas that the trench is between.

Claim 71

A method for forming an isolation structure, the method comprising: providing a semiconductor substrate having a planar upper surface and a plurality of active areas therein; forming a plurality of trenches in the semiconductor substrate, each said trench: being in between a respective pair of active areas and defined by a pair of sidewalls with a width therebetween and a bottom wall that is perpendicular to said sidewalls; having a pair of upper corners with a convex profile and a pair of lower corners with a concave profile; and having an oxide liner on a surface thereof; forming a plurality of islands, each said island being situated upon the planar upper surface of the semiconductor substrate between two respective trenches of said plurality of trenches and being separated from a respective adjacent island by a distance that is greater than the width between the sidewalls of each said trench, each said island comprising: a first dielectric layer upon the planar upper surface of the semiconductor substrate; a second dielectric layer having a composition different than the first dielectric layer and being situated upon the first dielectric layer; and a third dielectric layer having a planar top surface and having a composition different than and being situated upon the second dielectric layer; forming a covering layer, composed of an electrically insulative material, filling each said trench, covering each said island, and having a planar top surface, wherein each said trench electrically isolates the respective pair of active areas that the trench is between.