US5643822A
Expired / Lapsed
US
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Method for forming trench-isolated FET devices
Assignee: International Business Machines Corp
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Filing: 1995-01-10
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Granted: 1997-07-01
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Expires: 2015-01-10
Abstract
Abstract A method for improving the subthreshold leakage characteristics of a trench-isolated FET device is described. This method involves first forming a vertical slot within a stack structure disposed on an oxide-covered silicon substrate, and then forming spacers on the sidewalls of the slot. A trench is then etched in the substrate. Removal of the spacers uncovers a horizontal ledge on the exposed surfaces of the oxide-covered substrate, adjacent the trench. The ledge is then perpendicularly implanted with a suitable dopant, thereby suppressing edge conduction in the device. Articles prepared by this method are also described.
Inventors
- 👤 Toshiharu Furukawa
- 👤 Jack Allen Mandelman
- 👤 William R. Tonti
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 23:55
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0148; H10W10/10; H10W10/17
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
187 words
A method for improving the subthreshold leakage characteristics of a trench-isolated FET device, comprising the steps of: a) forming a vertical slot within a stack structure disposed on an oxide-covered silicon substrate, said slot terminating at the surface of the oxide; b) forming spacers on the sidewalls of the slot, each of said spacers having a base portion; c) etching a trench in the substrate, said trench being substantially self-aligned with the slot, and having a trench bottom and substantially vertical trench sidewalls, wherein the width of the trench is approximately equal to the distance between the base portions of the spacers; d) removing the spacers to uncover a horizontal ledge on an exposed upper surface of the oxide-covered substrate, the exposed upper surface being free of the stack structure disposed thereon, and the ledge being adjacent the trench; and e) perpendicularly implanting a dopant into the ledge in an amount sufficient to suppress edge conduction of the device, wherein the concentration of dopant atoms implanted into the sidewalls of the trench is less than about 30% of the concentration of dopant atoms implanted into the ledge.
Claim 2
Independent Claim
187 words
A method for improving the subthreshold leakage characteristics of a trench-isolated FET device, comprising the steps of: a) forming a vertical slot within a stack structure disposed on an oxide-covered silicon substrate, said slot terminating at the surface of the oxide; b) forming spacers on the sidewalls of the slot, each of said spacers having a base portion; c) etching a trench in the substrate, said trench being substantially self-aligned with the slot, and having a trench bottom and substantially vertical trench sidewalls, wherein the width of the trench is approximately equal to the distance between the base portions of the spacers; d) removing the spacers to uncover a horizontal ledge on an exposed upper surface of the oxide-covered substrate, the exposed upper surface being free of the stack structure disposed thereon, and the ledge being adjacent the trench; and e) perpendicularly implanting a dopant into the ledge in an amount sufficient to suppress edge conduction of the device, wherein the concentration of dopant atoms implanted into the sidewalls of the trench is less than about 30% of the concentration of dopant atoms implanted into the ledge.
Claim 3
Dependent Claim
44 words
The method of claim 1, wherein step (b) is carried out by applying a layer of a spacer material over substantially all of the exposed surfaces of the oxide-covered substrate and the stack structure; and then etching all horizontally-disposed regions of the spacer layer.
Claim 4
Dependent Claim
26 words
The method of claim 2, wherein the step of etching all horizontally-disposed surfaces is accomplished by applying a directed reactive ion beam downwardly onto the substrate.
Claim 5
Dependent Claim
18 words
The method of claim 2, wherein the spacer material is either plasma CVD oxide or a polymeric material.
Claim 6
Dependent Claim
15 words
The method of claim 1, wherein step (c) is carried out by reactive ion etching.
Claim 7
Dependent Claim
19 words
The method of claim 1, wherein removal of the spacers in step (d) is carried out by isotropic etching.
Claim 8
Dependent Claim
23 words
The method of claim 1, wherein the length of the ledge is in the range of about 100 Angstroms to about 2,000 Angstroms.
Claim 9
Dependent Claim
23 words
The method of claim 7, wherein the length of the ledge is in the range of about 100 Angstroms to about 1,500 Angstroms.
Claim 10
Dependent Claim
13 words
The method of claim 1, wherein the stack structure comprises a nitride layer.
Claim 11
Dependent Claim
29 words
The method of claim 1, wherein the stack structure comprises successively-deposited layers of (i) a nitride layer; (ii) a polymer layer; and (iii) a plasma-deposited oxide or nitride layer.
Claim 12
Dependent Claim
23 words
The method of claim 1, wherein the FET device is of the n-channel type, and the dopant implanted in step (e) is boron.
Claim 13
Dependent Claim
25 words
The method of claim 1, wherein the FET device is of the p-channel type, and the dopant implanted in step (e) is arsenic or phosphorous.
Claim 14
Dependent Claim
33 words
The method of claim 1, wherein the concentration of dopant atoms implanted into the ledge is in the range of about 5×10 16 atoms per cc to about 5×10 18 atoms per cc.
Claim 15
Dependent Claim
29 words
The method of claim 1, wherein the concentration of dopant atoms implanted into the ledge is about 2 to about 4 times that of the peak channel doping concentration.
Claim 16
Dependent Claim
33 words
The method of claim 1, wherein the concentration of dopant atoms implanted into the sidewalls of the trench is less than about 10% of the concentration of dopant atoms implanted into the ledge.
Claim 17
Dependent Claim
12 words
The method of claim 1, wherein the trench is a shallow trench.
Claim 18
Independent Claim
109 words
A method for improving the subthreshold leakage characteristics of a trench-isolated FET device, comprising the steps of forming a horizontal ledge on the surface of a substrate, said ledge being adjacent to a trench in the substrate, said trench having substantially vertical sidewalls therein, and then perpendicularly implanting a dopant into the ledge, in an amount sufficient to suppress edge conduction of the device, wherein the concentration of dopant atoms implanted into the sidewalls of the trench is less than about 30% of the concentration of dopant atoms implanted into the ledge, and wherein the dopant has a conductivity type the same as the conductivity type of the substrate.
Claim 19
Independent Claim
109 words
A method for improving the subthreshold leakage characteristics of a trench-isolated FET device, comprising the steps of forming a horizontal ledge on the surface of a substrate, said ledge being adjacent to a trench in the substrate, said trench having substantially vertical sidewalls therein, and then perpendicularly implanting a dopant into the ledge, in an amount sufficient to suppress edge conduction of the device, wherein the concentration of dopant atoms implanted into the sidewalls of the trench is less than about 30% of the concentration of dopant atoms implanted into the ledge, and wherein the dopant has a conductivity type the same as the conductivity type of the substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-06-30 | 2000-12-30 | 2001-07-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-06-30 | 2004-12-30 | 2005-07-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-06-30 | 2008-12-30 | 2009-07-01 | $7700.00 | Window Closed / Lapsed |