CMOS image sensor employing silicide exclusion mask to reduce leakage and improve performance

Claim 2

A CMOS active pixel image sensor apparatus having selectively formed silicide deposits for improved optical and electrical performance, the apparatus comprising a pixel with a photon sensor and associated circuit elements, the associated circuit elements requiring low leakage electrical characteristics for maintaining low photon sensor dark current, the apparatus further comprising a photon sensor output circuit for accessing the photon sensor, wherein the photon sensor output circuit elements employ silicides on silicon surfaces thereof for improved electrical conductivity.

Claim 3

The pixel image sensor apparatus of claim 1 further including a capacitor for storing photon sensor generated electrical charge having a silicided polysilicon upper plate.

Claim 4

The apparatus of claim 1 wherein the photon sensor is a photodiode.

Claim 5

A CMOS active pixel image sensor array comprising an array of CMOS active pixels, each CMOS active pixel comprising selectively formed silicide deposits for improved optical and electrical performance, each pixel having a photon sensor and associated circuit elements, the associated circuit elements requiring low leakage electrical characteristics for maintaining low photon sensor dark current, each CMOS active pixel further comprising a photon sensor readout circuit for reading out photon sensor data, wherein selected photon sensor readout circuit elements employ silicides on silicon surfaces thereof for improved electrical conductivity.

Claim 6

A CMOS active pixel image sensor array comprising an array of CMOS active pixels, each CMOS active pixel comprising selectively formed silicide deposits for improved optical and electrical performance, each pixel having a photon sensor and associated circuit elements, the associated circuit elements requiring low leakage electrical characteristics for maintaining low photon sensor dark current, each CMOS active pixel further comprising a photon sensor readout circuit for reading out photon sensor data, wherein selected photon sensor readout circuit elements employ silicides on silicon surfaces thereof for improved electrical conductivity.

Claim 7

A CMOS active pixel image sensor apparatus optimized for optical and electrical performance through the selective formation of silicides for improved electrical sheet and connection conductivity while maintaining optimal photon coupling to, and low dark current leakage from, the active pixel image sensor apparatus photon sensor, the apparatus comprising: (a) a photon sensor circuit that includes a photodiode for a photon sensor, and a reset circuit for initializing the photon sensor circuit by charging the photodiode cathode-to-anode capacitance to a known voltage level; and (b) a readout circuit coupled to the photodiode cathode for reading out the photodiode charge level after the photodiode has been exposed to photons generated by an image subject, the readout circuit further comprising a silicide layer formed on silicon surfaces thereof for increased conductivity of selected circuit elements.

Claim 8

A CMOS active pixel image sensor apparatus optimized for optical and electrical performance through the selective formation of silicides for improved electrical sheet and connection conductivity while maintaining optimal photon coupling to, and low dark current leakage from, the active pixel image sensor apparatus photon sensor, the apparatus comprising: (a) a photon sensor circuit that includes a photodiode for a photon sensor, and a reset circuit for initializing the photon sensor circuit by charging the photodiode cathode-to-anode capacitance to a known voltage level; and (b) a readout circuit coupled to the photodiode cathode for reading out the photodiode charge level after the photodiode has been exposed to photons generated by an image subject, the readout circuit further comprising a silicide layer formed on silicon surfaces thereof for increased conductivity of selected circuit elements.

Claim 9

The apparatus of claim 5 wherein the selected circuit elements include polysilicon gates.

Claim 10

The apparatus of claim 5 wherein the selected circuit elements include diffusions.

Claim 11

The apparatus of claim 5 wherein the selected circuit elements include silicon to metal connections.

Claim 12

The apparatus of claim 5 wherein the readout circuit further includes a switch for selectively connecting the readout circuit output to an array column output line.

Claim 13

A CMOS active pixel image sensor apparatus optimized for optical and electrical performance through the selective formation of silicides for improved electrical sheet and connection conductivity while maintaining optimal photon coupling to, and low dark current leakage from, the sensor apparatus photon sensor, the apparatus comprising: (a) a photon sensor circuit that includes a photodiode for sensing image subject generated photons and producing a photodiode current that is representative of the number of photons sensed, an externally controlled first switch for selectively connecting a capacitor in parallel with the photodiode for integrating the photodiode current to produce a charge representative of the integrated current, and an externally controlled reset circuit, externally controlled by a second switch for initializing the photon sensor circuit by charging the photodiode cathode-to-anode capacitance and by charging a capacitor to a known voltage level when the capacitor is connected in parallel with the photodiode by the first switch; and (b) a readout circuit having a capacitor selectively connected in parallel with the photodiode by the externally controlled first switch for initializing the capacitor charge and for integrating the photodiode current for producing a charge representative of the integrated photodiode current, and an externally controlled third switch for selectively connecting the capacitor charge to an output connection after the photodiode has been exposed to photons for a prescribed interval of time, the output connection connected to a column output line by the third switch that is controlled by a common row select line, the readout circuit further comprising a silicide layer formed on silicon surfaces thereof for increased conductivity of selected circuit elements.

Claim 14

A CMOS active pixel image sensor apparatus optimized for optical and electrical performance through the selective formation of silicides for improved electrical sheet and connection conductivity while maintaining optimal photon coupling to, and low dark current leakage from, the sensor apparatus photon sensor, the apparatus comprising: (a) a photon sensor circuit that includes a photodiode for sensing image subject generated photons and producing a photodiode current that is representative of the number of photons sensed, an externally controlled first switch for selectively connecting a capacitor in parallel with the photodiode for integrating the photodiode current to produce a charge representative of the integrated current, and an externally controlled reset circuit, externally controlled by a second switch for initializing the photon sensor circuit by charging the photodiode cathode-to-anode capacitance and by charging a capacitor to a known voltage level when the capacitor is connected in parallel with the photodiode by the first switch; and (b) a readout circuit having a capacitor selectively connected in parallel with the photodiode by the externally controlled first switch for initializing the capacitor charge and for integrating the photodiode current for producing a charge representative of the integrated photodiode current, and an externally controlled third switch for selectively connecting the capacitor charge to an output connection after the photodiode has been exposed to photons for a prescribed interval of time, the output connection connected to a column output line by the third switch that is controlled by a common row select line, the readout circuit further comprising a silicide layer formed on silicon surfaces thereof for increased conductivity of selected circuit elements.

Claim 15

The apparatus of claim 10 wherein the selected circuit elements include polysilicon gates.

Claim 16

The apparatus of claim 10 wherein the selected circuit elements include diffusions.

Claim 17

The apparatus of claim 10 wherein the selected circuit elements include silicon to metal connections.

Claim 18

The apparatus of claim 10 wherein the capacitor is a MOS transistor connected to form a capacitor between the transistor gate and the commonly connected source and drain of the transistor.

Claim 19

The apparatus of claim 10 wherein the first switch for connecting the capacitor in parallel with the photodiode when the capacitor is used to integrate photodiode current is also used for disconnecting the capacitor from the photodiode when the photodiode current is no longer to be integrated.

Claim 20

The array of claim 10 wherein the first, second, and third externally controlled switches are gate-controlled MOS transistors with silicided gates and connection pads for improved conductivity.

Claim 21

An array of CMOS active pixel image sensors organized to cover an area of a camera image-plane, each active pixel image sensor assigned to a specific location in the image-plane, the specific location specified by a row and column coordinate, and each active pixel image sensor connected by a selectable common row select line and a common selectable column output line for outputting a selected active pixel image sensor, each active pixel image sensor apparatus optimized for optical and electrical performance through the selective formation of silicides for improved electrical sheet and connection conductivity while maintaining optimal photon coupling to, and low dark current leakage from, the sensor apparatus photon sensor, each active pixel image sensor comprising: (a) a photon sensor circuit that includes a photodiode for sensing image subject generated photons and producing a photodiode current that is representative of the number of photons sensed, an externally controlled first switch for selectively connecting a capacitor in parallel with the photodiode for integrating the photodiode current to produce a charge representative of the integrated current, and an externally controlled reset circuit, externally controlled by a second switch for initializing the photon sensor circuit by charging the photodiode cathode-to-anode capacitance and by charging a capacitor to a known voltage level when the capacitor is connected in parallel with the photodiode by the first switch; and (b) a readout circuit having a capacitor selectively connected in parallel with the photodiode by the externally controlled first switch for initializing the capacitor charge and for integrating the photodiode current and for producing a charge representative of the integrated photodiode current, and an externally controlled third switch for selectively connecting the capacitor charge to an output connection after the photodiode has been exposed to photons for a prescribed interval of time, the output connection connected to a column output line by the third switch that is controlled by a common row select line, the readout circuit further comprising a silicide layer formed on silicon surfaces thereof for increased conductivity of selected circuit elements.

Claim 22

An array of CMOS active pixel image sensors organized to cover an area of a camera image-plane, each active pixel image sensor assigned to a specific location in the image-plane, the specific location specified by a row and column coordinate, and each active pixel image sensor connected by a selectable common row select line and a common selectable column output line for outputting a selected active pixel image sensor, each active pixel image sensor apparatus optimized for optical and electrical performance through the selective formation of silicides for improved electrical sheet and connection conductivity while maintaining optimal photon coupling to, and low dark current leakage from, the sensor apparatus photon sensor, each active pixel image sensor comprising: (a) a photon sensor circuit that includes a photodiode for sensing image subject generated photons and producing a photodiode current that is representative of the number of photons sensed, an externally controlled first switch for selectively connecting a capacitor in parallel with the photodiode for integrating the photodiode current to produce a charge representative of the integrated current, and an externally controlled reset circuit, externally controlled by a second switch for initializing the photon sensor circuit by charging the photodiode cathode-to-anode capacitance and by charging a capacitor to a known voltage level when the capacitor is connected in parallel with the photodiode by the first switch; and (b) a readout circuit having a capacitor selectively connected in parallel with the photodiode by the externally controlled first switch for initializing the capacitor charge and for integrating the photodiode current and for producing a charge representative of the integrated photodiode current, and an externally controlled third switch for selectively connecting the capacitor charge to an output connection after the photodiode has been exposed to photons for a prescribed interval of time, the output connection connected to a column output line by the third switch that is controlled by a common row select line, the readout circuit further comprising a silicide layer formed on silicon surfaces thereof for increased conductivity of selected circuit elements.

Claim 23

The apparatus of claim 17 wherein the selected circuit elements include polysilicon gates.

Claim 24

The apparatus of claim 17 wherein the selected circuit elements include diffusions.

Claim 25

The apparatus of claim 17 wherein the selected circuit elements include silicon to metal connections.

Claim 26

The apparatus of claim 17 wherein the capacitor is a MOS transistor connected to form a capacitor between the transistor gate and the commonly connected source and drain of the transistor.

Claim 27

The apparatus of claim 17 wherein the first switch for connecting the capacitor in parallel with the photodiode when the capacitor is used to integrate photodiode current is also used for disconnecting the capacitor from the photodiode when the photodiode current is no longer to be accumulated.

Claim 28

The apparatus of claim 18 wherein the first, second, and third externally controlled switches are gate-controlled MOS transistors with silicided connection pads on the gates for improved conductivity.