Patent US6074931A successfully refreshed from Google Patents.
US6074931A
Expired / Lapsed
US
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Process for recess-free planarization of shallow trench isolation
Assignee: Vanguard International Semiconductor Corp
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Filing: 1998-11-05
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Granted: 2000-06-13
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Expires: 2018-11-05
Abstract
Abstract An improved and new process for fabricating planarized isolation trenches, wherein sharp corners at the top periphery of the trench are eliminated and erosion of insulating material at the edges of isolation trenches is suppressed, has been developed. The process uses a two layer mask to etch the isolation trench, followed by an isotropic etch to recess the first layer of the mask. An oxide liner is formed in the trench and across the exposed edge of the trench resulting in rounding the corners of the trench. Then, a second isotropic etch is used to recess the edge of the second mask layer, so that its opening now is beyond the edge of the trench. An oxide layer is conformally deposited over all exposed surfaces and fills the trench. After CMP to planarize the oxide layer, the remaining oxide fills the trench and, also, extends a small distance beyond the edge of the trench and serves to protect edge of the trench during subsequent etching.
Inventors
- 👤 Jung-Ho Chang
- 👤 Hsi-Chuan Chen
- 👤 Dahcheng Lin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:08
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/10; H10W10/17
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
300 words
A method of forming a trench isolation region in a surface of a semiconductor substrate for the purpose of isolating active device areas, the method comprising the steps of: providing said semiconductor substrate containing active devices; forming a first oxide layer on the surface of said semiconductor substrate; forming a silicon nitride layer on said first oxide layer; removing portions of said silicon nitride layer and said first oxide layer to form an opening in said silicon nitride layer and said first oxide layer to expose a selected portion of the surface of said semiconductor substrate; etching said semiconductor substrate through said opening to form a trench in said semiconductor substrate; subjecting said first oxide layer to side etching through said openings to form a recess in said first oxide layer and, also, forming an exposed edge of said semiconductor substrate at the boundary with said trench; forming a second oxide layer over all exposed silicon surfaces including the inside of the trench and exposed edge of said semiconductor substrate at said boundary with said trench; subjecting said silicon nitride layer to isotropic etching which decreases the thickness of said silicon nitride layer and recesses the edge of the silicon nitride layer at said opening in said silicon nitride layer; forming a third oxide layer over all exposed surfaces, filling said trench in said semiconductor substrate; removing by CMP said third oxide layer, stopping in said silicon nitride layer, to leave a portion of said third oxide layer only in said trench, and to form a substantially planar surface between the remaining silicon nitride layer and the remaining third oxide layer; removing by etching the remaining silicon nitride layer; and removing the remaining first oxide layer on the surface of said semiconductor substrate, thereby forming a planarized oxide filled trench.
Claim 2
Independent Claim
300 words
A method of forming a trench isolation region in a surface of a semiconductor substrate for the purpose of isolating active device areas, the method comprising the steps of: providing said semiconductor substrate containing active devices; forming a first oxide layer on the surface of said semiconductor substrate; forming a silicon nitride layer on said first oxide layer; removing portions of said silicon nitride layer and said first oxide layer to form an opening in said silicon nitride layer and said first oxide layer to expose a selected portion of the surface of said semiconductor substrate; etching said semiconductor substrate through said opening to form a trench in said semiconductor substrate; subjecting said first oxide layer to side etching through said openings to form a recess in said first oxide layer and, also, forming an exposed edge of said semiconductor substrate at the boundary with said trench; forming a second oxide layer over all exposed silicon surfaces including the inside of the trench and exposed edge of said semiconductor substrate at said boundary with said trench; subjecting said silicon nitride layer to isotropic etching which decreases the thickness of said silicon nitride layer and recesses the edge of the silicon nitride layer at said opening in said silicon nitride layer; forming a third oxide layer over all exposed surfaces, filling said trench in said semiconductor substrate; removing by CMP said third oxide layer, stopping in said silicon nitride layer, to leave a portion of said third oxide layer only in said trench, and to form a substantially planar surface between the remaining silicon nitride layer and the remaining third oxide layer; removing by etching the remaining silicon nitride layer; and removing the remaining first oxide layer on the surface of said semiconductor substrate, thereby forming a planarized oxide filled trench.
Claim 3
Dependent Claim
11 words
The method of claim 1, wherein said semiconductor substrate is silicon.
Claim 4
Dependent Claim
39 words
The method of claim 1, wherein said first oxide layer is silicon oxide formed by thermal oxidation in an oxygen-steam ambient, at a temperature between about 800° and 1000° C., to a thickness between about 50 and 500 Angstroms.
Claim 5
Dependent Claim
26 words
The method of claim 1, wherein said silicon nitride layer is formed by LPCVD or PECVD processes to a thickness between about 1000 and 3000 Angstroms.
Claim 6
Dependent Claim
28 words
The method of claim 1, wherein said side etching of said first oxide layer is performed using a buffered or dilute hydrofluoric acid solution in H 2 O.
Claim 7
Dependent Claim
35 words
The method of claim 5, wherein said side etching of said first oxide layer recesses the edge of said first oxide a distance between about 30 and 300 Angstroms beyond the edge of said trench.
Claim 8
Dependent Claim
37 words
The method of claim 1, wherein said second oxide layer is formed by thermal oxidation in an oxygen-steam ambient, at a temperature between about 800° and 1000° C., to a thickness between about 100 and 500 Angstroms.
Claim 9
Dependent Claim
22 words
The method of claim 1, wherein said isotropic etching of said silicon nitride layer is performed using a hot phosphoric acid solution.
Claim 10
Dependent Claim
29 words
The method claim 8, wherein said isotropic etching of said silicon nitride layer recesses the edge of said silicon nitride layer a distance between about 200 and 600 Angstroms.
Claim 11
Dependent Claim
29 words
The method of claim 1, wherein said third oxide layer is silicon oxide deposited conformally by LPCVD or PECVD processes to a thickness between about 2000 and 10,000 Angstroms.
Claim 12
Dependent Claim
20 words
The method of claim 1, wherein said etching of the remaining silicon nitride layer is performed using hot phosphoric acid.
Claim 13
Dependent Claim
34 words
The method of claim 1, wherein removing the remaining first oxide layer on the surface of said semiconductor substrate is by etching using a buffered or dilute hydrofluoric acid solution in H 2 O.
Claim 14
Independent Claim
300 words
A method of forming a trench isolation region in a surface of a silicon substrate for the purpose of isolating active device areas, the method comprising the steps of: providing said silicon substrate containing active devices; forming a first oxide layer on the surface of said silicon substrate; forming a silicon nitride layer on said first oxide layer; removing portions of said silicon nitride layer and said first oxide layer to form an opening in said silicon nitride layer and said first oxide layer to expose a selected portion of the surface of said silicon substrate; etching said silicon substrate through said opening to form a trench in said silicon substrate; subjecting said first oxide layer to side etching through said openings to form a recess in said first oxide layer and, also, forming an exposed edge of said silicon substrate at the boundary with said trench; forming a second oxide layer over all exposed silicon surfaces including the inside of the trench and exposed edge of said silicon substrate at said boundary with said trench; subjecting said silicon nitride layer to isotropic etching which decreases the thickness of said silicon nitride layer and recesses the edge of the silicon nitride layer at said opening in said silicon nitride layer; forming a third oxide layer over all exposed surfaces, filling said trench in said silicon substrate; removing by CMP said third oxide layer, stopping in said silicon nitride layer, to leave a portion of said third oxide layer only in said trench, and to form a substantially planar surface between the remaining silicon nitride layer and the remaining third oxide layer; removing by etching the remaining silicon nitride layer; and removing the remaining first oxide layer on the surface of said silicon substrate, thereby forming a planarized oxide filled trench.
Claim 15
Independent Claim
300 words
A method of forming a trench isolation region in a surface of a silicon substrate for the purpose of isolating active device areas, the method comprising the steps of: providing said silicon substrate containing active devices; forming a first oxide layer on the surface of said silicon substrate; forming a silicon nitride layer on said first oxide layer; removing portions of said silicon nitride layer and said first oxide layer to form an opening in said silicon nitride layer and said first oxide layer to expose a selected portion of the surface of said silicon substrate; etching said silicon substrate through said opening to form a trench in said silicon substrate; subjecting said first oxide layer to side etching through said openings to form a recess in said first oxide layer and, also, forming an exposed edge of said silicon substrate at the boundary with said trench; forming a second oxide layer over all exposed silicon surfaces including the inside of the trench and exposed edge of said silicon substrate at said boundary with said trench; subjecting said silicon nitride layer to isotropic etching which decreases the thickness of said silicon nitride layer and recesses the edge of the silicon nitride layer at said opening in said silicon nitride layer; forming a third oxide layer over all exposed surfaces, filling said trench in said silicon substrate; removing by CMP said third oxide layer, stopping in said silicon nitride layer, to leave a portion of said third oxide layer only in said trench, and to form a substantially planar surface between the remaining silicon nitride layer and the remaining third oxide layer; removing by etching the remaining silicon nitride layer; and removing the remaining first oxide layer on the surface of said silicon substrate, thereby forming a planarized oxide filled trench.
Claim 16
Dependent Claim
39 words
The method of claim 13, wherein said first oxide layer is silicon oxide formed by thermal oxidation in an oxygen-steam ambient, at a temperature between about 800° and 1000° C., to a thickness between about 50 and 500 Angstroms.
Claim 17
Dependent Claim
26 words
The method of claim 13, wherein said silicon nitride layer is formed by LPCVD or PECVD processes to a thickness between about 1000 and 3000 Angstroms.
Claim 18
Dependent Claim
28 words
The method of claim 13, wherein said side etching of said first oxide layer is performed using a buffered or dilute hydrofluoric acid solution in H 2 O.
Claim 19
Dependent Claim
35 words
The method of claim 16, wherein said side etching of said first oxide layer recesses the edge of said first oxide a distance between about 30 and 300 Angstroms beyond the edge of said trench.
Claim 20
Dependent Claim
37 words
The method of claim 13, wherein said second oxide layer is formed by thermal oxidation in an oxygen-steam ambient, at a temperature between about 800° and 1000° C., to a thickness between about 100 and 500 Angstroms.
Claim 21
Dependent Claim
20 words
The method of claim 13, wherein said isotropic etching of said silicon nitride layer is performed using hot phosphoric acid.
Claim 22
Dependent Claim
29 words
The method claim 19, wherein said isotropic etching of said silicon nitride layer recesses the edge of said silicon nitride layer a distance between about 200 and 600 Angstroms.
Claim 23
Dependent Claim
29 words
The method of claim 13, wherein said third oxide layer is silicon oxide deposited conformally by LPCVD or PECVD processes to a thickness between about 2000 and 10,000 Angstroms.
Claim 24
Dependent Claim
20 words
The method of claim 13, wherein said etching of the remaining silicon nitride layer is performed using hot phosphoric acid.
Claim 25
Dependent Claim
34 words
The method of claim 13, wherein removing the remaining first oxide layer on the surface of said semiconductor substrate is by etching using a buffered or dilute hydrofluoric acid solution in H 2 O.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-06-13 | 2003-12-13 | 2004-06-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-06-13 | 2007-12-13 | 2008-06-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-06-13 | 2011-12-13 | 2012-06-13 | $7700.00 | Window Closed / Lapsed |