US6063698A
Expired / Lapsed
US
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Method for manufacturing a high dielectric constant gate oxide for use in semiconductor integrated circuits
Assignee: NXP USA Inc
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Filing: 1997-06-30
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Granted: 2000-05-16
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Expires: 2017-06-30
Abstract
Abstract A method for forming a gate dielectric (14b) begins by providing a substrate (12). A high K dielectric layer (14a) is deposited overlying the substrate (12). The dielectric layer (14a) contains bulk traps (16) and interface traps (18). A polysilicon gate electrode (20) is then patterned and etched overlying the gate dielectric (14a) whereby the plasma etching of the gate electrode (20) results in substrate plasma damage (22). A post gate wet oxidation process is performed between 750° C. and 850° C. to reduce plasma etch damage and trap sites (16, 18) in order to provide an improved gate dielectric (14b). Source and drain electrodes (30) are then formed within the substrate and laterally adjacent the gate electrode (20) to form a transistor device having more consistent threshold voltages, improved subthreshold slope operation, reduced gate to channel leakage, and improved speed of operation.
Inventors
- 👤 Hsing-Huang Tseng
- 👤 Philip J. Tobin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 19:28
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/01338; H10D64/01354; H10D64/60; H10D64/66; H10D64/671; H10D64/01342; H10D64/01344; H10D64/021; H10D64/68; H10D64/691; H10D64/693; Y; Y10; Y10S; Y10S438/00; Y10S438/91
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
101 words
A method for forming a semiconductor structure, the method comprising the steps of: providing a substrate having a surface; forming a high-k dielectric layer over the substrate, the high-k dielectric layer having bulk traps and interface traps; forming a gate layer over the high-k dielectric layer; etching the gate layer in a plasma environment to form a gate region, wherein the step of etching causes a plasma etch damage in the substrate; and performing a low temperature wet oxidation step to inactivate the bulk traps and interface traps associated with the high-k dielectric layer, and to reduce the plasma etch damage.
Claim 2
Independent Claim
101 words
A method for forming a semiconductor structure, the method comprising the steps of: providing a substrate having a surface; forming a high-k dielectric layer over the substrate, the high-k dielectric layer having bulk traps and interface traps; forming a gate layer over the high-k dielectric layer; etching the gate layer in a plasma environment to form a gate region, wherein the step of etching causes a plasma etch damage in the substrate; and performing a low temperature wet oxidation step to inactivate the bulk traps and interface traps associated with the high-k dielectric layer, and to reduce the plasma etch damage.
Claim 3
Dependent Claim
28 words
The method of claim 1, wherein the step of forming the high-k dielectric layer comprises: using a chemical vapor deposition (CVD) process to form the high-k dielectric layer.
Claim 4
Dependent Claim
29 words
The method of claim 2, wherein the step of forming a high-k dielectric layer comprises: forming the high-k dielectric layer with a relative permitivity of greater than approximately 5.
Claim 5
Dependent Claim
31 words
The method of claim 2, wherein the step of forming the high-k dielectric layer comprises: using a jet vapor deposition process as the CVD process to form the high-k dielectric layer.
Claim 6
Dependent Claim
25 words
The method of claim 1, wherein the step of forming the high-k dielectric layer comprises: using a sputtering process to form the high-k dielectric layer.
Claim 7
Dependent Claim
31 words
The method of claim 1, wherein the step of forming the high-k dielectric layer comprises: forming the high-k dielectric layer having an SiO2 equivalent thickness of less than approximately 40 angstroms.
Claim 8
Dependent Claim
24 words
The method of claim 1, wherein the step of forming the high-k dielectric layer comprises: forming the high-k dielectric layer to include an oxide.
Claim 9
Dependent Claim
25 words
The method of claim 7, wherein the step of forming the high-k dielectric layer comprises: forming the high-k dielectric layer to further include silicon nitride.
Claim 10
Dependent Claim
27 words
The method of claim 7, wherein the step of forming the high-k dielectric layer comprises: forming the high-k dielectric layer wherein the oxide is a metal oxide.
Claim 11
Dependent Claim
23 words
The method of claim 9, wherein the step of forming the high-k dielectric layer comprises: forming a Titanium oxide as the metal oxide.
Claim 12
Dependent Claim
23 words
The method of claim 9, wherein the step of forming the high-k dielectric layer comprises: forming a Tantalum oxide as the metal oxide.
Claim 13
Dependent Claim
35 words
The method of claim 1, wherein the step of performing the low temperature wet oxidation comprises: performing the low temperature wet oxidation step at a temperature in a range of approximately 750° to 850° Celsius.
Claim 14
Dependent Claim
27 words
The method of claim 1, wherein the step of performing the low temperature wet oxidation comprises: introducing approximately 3 to 9 molecular percentage of hydrogen to oxygen.
Claim 15
Dependent Claim
25 words
The method of claim 1, wherein the step of etching the gate layer further includes etching the gate layer using a reactive ion etch (RIE).
Claim 16
Dependent Claim
30 words
The method of claim 1, wherein the step of forming a high-k dielectric layer comprising: forming the high-k dielectric layer to have a relative permitivity of greater than approximately 8.
Claim 17
Dependent Claim
16 words
The method of claim 1, further comprising a step of: performing an anneal that includes Nitrogen.
Claim 18
Dependent Claim
25 words
The method of claim 16, wherein the step of perfoming the anneal comprises: performing the anneal in situ with the low temperature wet oxidation step.
Claim 19
Independent Claim
138 words
A method for forming a semiconductor structure, the method comprising the steps of: providing a substrate having a surface; forming a dielectric layer over the substrate using a chemical vapor deposition (CVD), wherein a the CVD process causes a formation of bulk traps and interface traps; forming a gate layer over the dielectric layer; etching the gate layer and the dielectric layer in a plasma environment to form a gate region, wherein the plasma environment at least partially causes a first leakage current between the gate and the substrate; and performing a low temperature wet oxidation to reduce the bulk traps and interface traps, wherein there is a second leakage current between the gate and substrate following the step of performing a low temperature wet oxidation and the second leakage current is less than the first leakage current.
Claim 20
Independent Claim
138 words
A method for forming a semiconductor structure, the method comprising the steps of: providing a substrate having a surface; forming a dielectric layer over the substrate using a chemical vapor deposition (CVD), wherein a the CVD process causes a formation of bulk traps and interface traps; forming a gate layer over the dielectric layer; etching the gate layer and the dielectric layer in a plasma environment to form a gate region, wherein the plasma environment at least partially causes a first leakage current between the gate and the substrate; and performing a low temperature wet oxidation to reduce the bulk traps and interface traps, wherein there is a second leakage current between the gate and substrate following the step of performing a low temperature wet oxidation and the second leakage current is less than the first leakage current.
Claim 21
Independent Claim
111 words
A method for forming a semiconductor structure, the method comprising the steps of: forming a dielectric layer having an oxide equivalent thickness of less than approximately 40 Angstroms over a semiconductor substrate; forming a gate layer; etching the gate layer and the dielectric layer, by a plasma etch process, to form a patterned gate structure; placing the semiconductor substrate in an oxidation chamber; heating the oxidation chamber to approximately 750° to 850° Celsius; introducing oxygen into the oxidation chamber; introducing a diluted amount of hydrogen into the oxidation chamber at a substantially same time as the oxygen; and maintaining 750° to 850° Celsius in the oxidation chamber for approximately 15 minutes.
Claim 22
Independent Claim
111 words
A method for forming a semiconductor structure, the method comprising the steps of: forming a dielectric layer having an oxide equivalent thickness of less than approximately 40 Angstroms over a semiconductor substrate; forming a gate layer; etching the gate layer and the dielectric layer, by a plasma etch process, to form a patterned gate structure; placing the semiconductor substrate in an oxidation chamber; heating the oxidation chamber to approximately 750° to 850° Celsius; introducing oxygen into the oxidation chamber; introducing a diluted amount of hydrogen into the oxidation chamber at a substantially same time as the oxygen; and maintaining 750° to 850° Celsius in the oxidation chamber for approximately 15 minutes.
Claim 23
Dependent Claim
33 words
The method of claim 19, the oxygen is introduced at a rate of 20 standard liters per minute (SLM); and the diluted amount of hydrogen is introduce at a rate of 10 SLM.
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| 3.5 Years (Year 4) | 2003-05-16 | 2003-11-15 | 2004-05-16 | $2000.00 | Window Closed / Lapsed |
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