Method of proudcing a MIS transistor

Claim 1

A method of producing a MIS transistor, comprising the steps of: (a) forming a gate insulation film on a major surface of a semiconductor substrate of a first conduction type; (b) forming a gate electrode on said gate insulation film; (c) performing ion-implantation on said substrate by using said gate electrode as a mask for forming a source and drain low density diffusion layer of a second conduction type on said substrate; (d) depositing a first insulating film which covers said gate electrode and said semiconductor substrate; (e) depositing a dielectric film on said first insulating film, said dielectric film having a dielectric constant that is higher than that of said first insulating film; (f) effecting an etching process with a large anisotropy vertical to said substrate, to said dielectric film so as to allow said dielectric film to remain along said first insulation film at portions thereof adjacent side surfaces of said gate electrode and disposed above said substrate, said dielectric film having a height that is lower than that of said gate electrode and making contact with said first insulation film adjacent said side surfaces of said gate electrode; (g) depositing a second insulating film all over a major surface of said substrate; (h) effecting an etching process on said second insulating film so as to allow said second insulating film to continue to cover said dielectric film and to make contact with said first insulating film adjacent said side surfaces of said gate electrode; (i) performing ion-implantation on said substrate while using said second insulating film and said gate electrode as a mask for forming a source and drain high density diffusion layer of said second conduction type that is joined to said low density diffusion layer; and (j) forming a source and drain electrode on said source and drain high density diffusion layer of said second conduction type.

Claim 2

A method of producing a MIS transistor, comprising the steps of: (a) forming a gate insulation film on a major surface of a semiconductor substrate of a first conduction type; (b) forming a gate electrode on said gate insulation film; (c) performing ion-implantation on said substrate by using said gate electrode as a mask for forming a source and drain low density diffusion layer of a second conduction type on said substrate; (d) depositing a first insulating film which covers said gate electrode and said semiconductor substrate; (e) depositing a dielectric film on said first insulating film, said dielectric film having a dielectric constant that is higher than that of said first insulating film; (f) effecting an etching process with a large anisotropy vertical to said substrate, to said dielectric film so as to allow said dielectric film to remain along said first insulation film at portions thereof adjacent side surfaces of said gate electrode and disposed above said substrate, said dielectric film having a height that is lower than that of said gate electrode and making contact with said first insulation film adjacent said side surfaces of said gate electrode; (g) depositing a second insulating film all over a major surface of said substrate; (h) effecting an etching process on said second insulating film so as to allow said second insulating film to continue to cover said dielectric film and to make contact with said first insulating film adjacent said side surfaces of said gate electrode; (i) performing ion-implantation on said substrate while using said second insulating film and said gate electrode as a mask for forming a source and drain high density diffusion layer of said second conduction type that is joined to said low density diffusion layer; and (j) forming a source and drain electrode on said source and drain high density diffusion layer of said second conduction type.