Method to reduce metal damage in the HDP-CVD process by using a sacrificial dielectric film

Abstract

Abstract Two approaches are proposed for forming an inter-metal dielectric layer with improved metal damage characteristics. This is of utmost importance for sub-quarter micron feature sizes, where thin metal lines are particularly susceptible to damage and where the HDP-CVD processes, which are used because of their excellent gap filling characteristics, are apt to cause metal damage. In approach one, a partially processed semiconductor wafer is provided containing a blanket layer of metal. A blanket dielectric layer is deposited. This layer could, for example, be silicone oxide, silicon nitride or silicone oxynitride; and the deposition process could be APCVD, LPCVD, 03-TEOS CVD or PECVD. The layer thickness could be in the range from about 0.01 microns to about 0.2 microns. Patterning and etching the blanket metal layer and protective dielectric layer results in the desired metal structure, except with a dielectric cap. The HDP-CVD insulating layer can now be deposited without concern for metal damage. In approach two, a protective dielectric is formed conformably over the patterned metal layer using processes that do not cause metal damage; examples of appropriate dielectrics and deposition processes are as listed in approach one. The gap filling capabilities of these processes cannot compare with that of HDP-CVD processes; however, since an HDP-CVD insulating will be deposited subsequently, this deficiency will be rectified. In either approach, damage to thin metal lines resulting from HDP-CVD processes is significantly reduced or eliminated thus increasing device yield and reliability.

Inventors

• 👤 Weng Chang
• 👤 Syun-Ming Jang

Bibliographic Details