Patent US6040619A successfully refreshed from Google Patents.
US6040619A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device including antireflective etch stop layer
Assignee: Advanced Micro Devices Inc
•
Filing: 1997-09-25
•
Granted: 2000-03-21
•
Expires: 2017-09-25
Abstract
Abstract A microelectronic device such as a Metal-Oxide-Semiconductor (MOS) transistor is formed on a semiconductor substrate. A tungsten damascene interconnect for the device is formed using an etch stop layer of silicon nitride, silicon oxynitride or silicon oxime having a high silicon content of approximately 40% to 50% by weight. The etch stop layer has high etch selectivity relative to overlying insulator materials such as silicon dioxide, tetraethylorthosilicate (TEOS) glass and borophosphosilicate glass (BPSG). The etch stop layer also has a high index of refraction and is anti-reflective, thereby improving critical dimension control during photolithographic imaging.
Inventors
- 👤 Fei Wang
- 👤 David K. Foote
- 👤 Myron R. Cagan
- 👤 Subhash Gupta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:29
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; H10P14/6927; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/074; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6336; H10P14/69215; H10P14/6923; H10P14/694; H10P14/6943; H10P14/69433; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; H10P76/2043; H10W20/031; H10W20/069; H10W20/0693; H10W20/0698; H10W20/077; H10W20/081; H10W20/40; H10W20/41; H10W20/42
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
53 words
A semiconductor structure, comprising: a semiconductor substrate; a semiconductor device formed on a surface of the substrate; and a layer of silicon oxime formed over the surface of the substrate and the device, the layer having a silicon content of approximately 40% to 50% by weight and a thickness of approximately 800 ű10%.
Claim 2
Dependent Claim
53 words
A semiconductor structure, comprising: a semiconductor substrate; a semiconductor device formed on a surface of the substrate; and a layer of silicon oxime formed over the surface of the substrate and the device, the layer having a silicon content of approximately 40% to 50% by weight and a thickness of approximately 800 ű10%.
Claim 3
Dependent Claim
89 words
A structure as in claim 1, in which: the device comprises an interconnect area; the layer is an etch stop layer; and the structure further comprises: an insulator layer formed over the etch stop layer; a first hole formed through the insulator layer to the etch stop layer in alignment with the interconnect area; a second hole formed through the etch stop layer to the interconnect area; and an electrically conductive material which fills the first and second holes and ohmically contacts the interconnect area to form an interconnect.
Claim 4
Dependent Claim
19 words
A structure as in claim 1, in which the layer is formed at a temperature of approximately 400° C.±10%.
Claim 5
Dependent Claim
14 words
A structure as in claim 2, in which the interconnect is a local interconnect.
Claim 6
Dependent Claim
14 words
A structure as in claim 2, in which the interconnect is a self-aligned contact.
Claim 7
Dependent Claim
14 words
A structure as in claim 2, in which the interconnect is a borderless via.
Claim 8
Dependent Claim
40 words
A structure as in claim 3, in which the layer is formed of silicon oxime using Plasma Enhanced Chemical Vapor Deposition (PECVD), with: an SiH 4 flow rate of approximately 115 sccm±10%; and an RF power of approximately 325 watts±10%.
Claim 9
Dependent Claim
33 words
A structure as in claim 7, in which the layer is formed with an N 2 O flow rate of approximately 41 sccm±10%, and an N 2 flow rate of approximately 550 sccm±10%.
Claim 10
Dependent Claim
19 words
A structure as in claim 7, in which the layer is formed at a pressure of approximately 3.5 torr±10%.
Claim 11
Dependent Claim
30 words
A structure as in claim 7, in which the layer is formed with a spacing between a PECVD shower head and the surface of the substrate of approximately 9.14 millimeters±10%.
References Cited (Backward Citations)
US4767724A
Cited
EP0326293A1
Cited
EP0337109A1
Cited
EP0425787A2
Cited
US5266154A
Cited
US5731242A
Cited
US5674356A
Cited
US5741736A
Cited
US5622596A
Cited
US5710067A
Cited
US5741626A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-03-21 | 2003-09-20 | 2004-03-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-03-21 | 2007-09-20 | 2008-03-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-03-21 | 2011-09-20 | 2012-03-21 | $7700.00 | Window Closed / Lapsed |