EP0425787A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Method for fabricating high circuit density, self-aligned metal lines to contact windows
Assignee: International Business Machines Corp
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Filing: 1990-08-29
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Granted: —
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Expires: 2010-08-29
Abstract
Abstract A method is disclosed for fabricating patterned conductive lines which are self-aligned with underlying contact windows. According to the method, a layer of a photosensitive material (23) is formed over a dielectric layer. The photoresist layer is processed to have fully developed areas (29), partially developed areas (27) and undeveloped areas (25). The dielectric layer is preferably a compound dielectric layer to reduce interlevel shorts. Through the use of selective etch steps, the compound dielectric layers aid in the formation of the patterned conductive line and contact window structure. A series of reactive ion etch (RIE) steps are performed. The first RIE step etches the fully developed areas (29) at least partially through the dielectric thickness. In the second RIE step, the photoresist (23) is removed. The third RIE step etches the dielectric to form channels where the conductive lines are formed, and completes the etching in the contact window areas. The remaining resist is then removed. The channels and contacts are overfilled with a deposition of a conductive material. This conductive material is then planarized by either a RIE process or a chemical-mechanical polishing step.
Inventors
- 👤 Harish N. Kotecha
- 👤 Hans A. Protschka
- 👤 Dave Stanasolovich
- 👤 Jacob F. Theisen
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 21:18
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/062; H10W20/071; H10W20/081
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
189 words
A method for fabricating a patterned conductive layer self-aligned to underlying contact windows in a dielectric layer on a semiconductor substrate comprising the steps of: forming a photosensitive layer (23) over said dielectric layer, said photosensitive layer having fully developed areas (29), partially developed areas (27) and undeveloped areas (25) over said dielectric layer, wherein said fully developed areas (29) and said partially developed areas (27) are aligned to each other; selectively etching said dielectric layer in said areas (29) where said photosensitive layer is fully developed to form contact windows which at least partially penetrate said dielectric layer; selectively removing said partially developed areas (27) of the photosensitive layer (23); etching said dielectric layer in said areas (27) where said photosensitive layer was partially developed to a predetermined depth to form channels for said patterned conductive layer, and in said areas (29) where said photosensitive layer was fully developed entirely through said dielectric layer to form contact windows to said semiconductor substrate (10); depositing a conductive material over said dielectric layer; and planarizing said conductive layer to remove said conductive layer from unetched areas of said dielectric layer.
Claim 2
Independent Claim
189 words
A method for fabricating a patterned conductive layer self-aligned to underlying contact windows in a dielectric layer on a semiconductor substrate comprising the steps of: forming a photosensitive layer (23) over said dielectric layer, said photosensitive layer having fully developed areas (29), partially developed areas (27) and undeveloped areas (25) over said dielectric layer, wherein said fully developed areas (29) and said partially developed areas (27) are aligned to each other; selectively etching said dielectric layer in said areas (29) where said photosensitive layer is fully developed to form contact windows which at least partially penetrate said dielectric layer; selectively removing said partially developed areas (27) of the photosensitive layer (23); etching said dielectric layer in said areas (27) where said photosensitive layer was partially developed to a predetermined depth to form channels for said patterned conductive layer, and in said areas (29) where said photosensitive layer was fully developed entirely through said dielectric layer to form contact windows to said semiconductor substrate (10); depositing a conductive material over said dielectric layer; and planarizing said conductive layer to remove said conductive layer from unetched areas of said dielectric layer.
Claim 3
Dependent Claim
54 words
The method as recited in claim 1 wherein said dielectric layer is a compound dielectric layer formed from a first layer (15) of a first dielectric material, a first layer (17) of a second dielectric material, a second layer (19) of said first dielectric material and second layer (21) of said second dielectric material.
Claim 4
Dependent Claim
16 words
The method as recited in claim 1 or 2 wherein said conductive layer is a metal.
Claim 5
Independent Claim
18 words
The method as recited in anyone of the preceding claims wherein said conductive material is a compound metal.
Claim 6
Independent Claim
19 words
The method as recited in anyone of the preceding claims wherein said photosensitive layer is a positive photoresist layer.
Claim 7
Independent Claim
45 words
The method as recited in anyone of claims 2 to 5 wherein said first and second layers of said first dielectric material function as etch stop barriers, and said predetermined depth is equal to the thickness of said second layer of said second dielectric material.
Claim 8
Independent Claim
27 words
The method as recited in anyone of claims 2 to 6 wherein said first dielectric material is silicon nitride and said second dielectric material is silicon oxide.
Claim 9
Independent Claim
231 words
A method for fabricating conductive lines self-aligned to underlying contact windows in a dielectric layer over a semiconductor substrate, comprising the steps of: forming an etch stop layer (15) over said substrate; forming a dielectric layer over said substrate; forming a photoresist layer (23) having fully developed areas (29) in the pattern of said contacts, partially developed areas (27) in the pattern of said conductive lines and undeveloped areas (25) over said dielectric layer, wherein said fully developed areas (29) and said partially developed areas (27) are aligned to each other; selectively etching said dielectric layer in said areas (29) where said photoresist is fully developed to form contact windows which at least partially penetrate said dielectric layer; selectively etching away said partially developed areas (27) of the photoresist (23); etching said dielectric layer in said areas (27) where said photoresist was partially developed to a predetermined depth to form channels for said conductive lines, and in said areas (29) where said photoresist was fully developed entirely through said dielectric layer to form contact windows to said semiconductor substrate (10); etching through said etch stop layer at where said contact windows are formed to contact with said semiconductor devices; depositing a conductive layer over said dielectric layer, filling said contact windows and channels; and, planarizing said conductive layer to selectively remove said conductive layer from unetched areas of said dielectric layer.
Claim 10
Independent Claim
231 words
A method for fabricating conductive lines self-aligned to underlying contact windows in a dielectric layer over a semiconductor substrate, comprising the steps of: forming an etch stop layer (15) over said substrate; forming a dielectric layer over said substrate; forming a photoresist layer (23) having fully developed areas (29) in the pattern of said contacts, partially developed areas (27) in the pattern of said conductive lines and undeveloped areas (25) over said dielectric layer, wherein said fully developed areas (29) and said partially developed areas (27) are aligned to each other; selectively etching said dielectric layer in said areas (29) where said photoresist is fully developed to form contact windows which at least partially penetrate said dielectric layer; selectively etching away said partially developed areas (27) of the photoresist (23); etching said dielectric layer in said areas (27) where said photoresist was partially developed to a predetermined depth to form channels for said conductive lines, and in said areas (29) where said photoresist was fully developed entirely through said dielectric layer to form contact windows to said semiconductor substrate (10); etching through said etch stop layer at where said contact windows are formed to contact with said semiconductor devices; depositing a conductive layer over said dielectric layer, filling said contact windows and channels; and, planarizing said conductive layer to selectively remove said conductive layer from unetched areas of said dielectric layer.
Claim 11
Dependent Claim
42 words
The method as recited in claim 8 wherein said dielectric layer is a compound dielectric layer formed from a first layer of a first dielectric material, a layer of a second dielectric material and a second layer of said first dielectric material.
Claim 12
Dependent Claim
14 words
The method as recited in claim 8 wherein said conductive layer is a metal.
Claim 13
Dependent Claim
21 words
The method as recited in claim 9 wherein said layer of said second dielectric material functions as an etch stop barrier.
Claim 14
Dependent Claim
23 words
The method as recited in claim 9 wherein said first dielectric material is silicon oxide and said second dielectric material is silicon nitride.
Claim 15
Independent Claim
50 words
A method for fabricating a multi-level structure of patterned conductive layers self-aligned to underlying contact windows in a dielectric layer on a semiconductor substrate comprising the steps as disclosed in anyone of claims 1 to 7 or 8 to 12 with the exception of depositing said first etch stop layer.
References Cited (Backward Citations)
No citation records indexed.
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