US6037234A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of fabricating capacitor
Assignee: United Microelectronics Corp
•
Filing: 1998-02-13
•
Granted: 2000-03-14
•
Expires: 2018-02-13
Abstract
Abstract A method of fabricating a capacitor in a DRAM. A semiconductor substrate having a metal-oxide-semiconductor is provided. Using only one photolithography process, a bottom electrode is formed. By forming a dielectric layer over the substrate, and a poly-silicon layer on the dielectric layer, a capacitor is formed.
Inventors
- 👤 Gary Hong
- 👤 Anchor Chen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 08:00
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10D; H10D1/00; H10D1/01; H10D1/041; H10D1/042; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/716; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/084
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
223 words
A method of fabricating a capacitor, wherein a semiconductor substrate having a metal-oxide-semiconductor is provided, comprising: forming a first oxide layer, a silicon nitride layer, a second oxide layer, and a first poly-silicon layer on the substrate in sequence; patterning the first poly-silicon layer and the second oxide layer to form a first opening, so that the silicon nitride layer within the first opening is exposed; forming a third oxide layer over the substrate; etching the third oxide layer with the silicon nitride layer as an etch stop; etching the silicon nitride layer to form a second opening the first oxide layer is exposed, using the remaining third oxide layer and the first poly-silicon layer as masks; deepening the second opening by etching the first oxide layer until the substrate is exposed; forming a second poly-silicon layer to cover the first poly-silicon layer and the first opening, and to fill the second opening; forming a fourth oxide layer on the second poly-silicon layer; removing the fourth oxide layer, the second poly-silicon layer, and the first poly-silicon layer until the second oxide layer is exposed; wet etching the remaining fourth oxide layer and the second oxide layer with the silicon nitride layer as an etch stop; forming an insulation layer over the silicon substrate; and forming a third poly-silicon layer on the insulation layer.
Claim 2
Independent Claim
223 words
A method of fabricating a capacitor, wherein a semiconductor substrate having a metal-oxide-semiconductor is provided, comprising: forming a first oxide layer, a silicon nitride layer, a second oxide layer, and a first poly-silicon layer on the substrate in sequence; patterning the first poly-silicon layer and the second oxide layer to form a first opening, so that the silicon nitride layer within the first opening is exposed; forming a third oxide layer over the substrate; etching the third oxide layer with the silicon nitride layer as an etch stop; etching the silicon nitride layer to form a second opening the first oxide layer is exposed, using the remaining third oxide layer and the first poly-silicon layer as masks; deepening the second opening by etching the first oxide layer until the substrate is exposed; forming a second poly-silicon layer to cover the first poly-silicon layer and the first opening, and to fill the second opening; forming a fourth oxide layer on the second poly-silicon layer; removing the fourth oxide layer, the second poly-silicon layer, and the first poly-silicon layer until the second oxide layer is exposed; wet etching the remaining fourth oxide layer and the second oxide layer with the silicon nitride layer as an etch stop; forming an insulation layer over the silicon substrate; and forming a third poly-silicon layer on the insulation layer.
Claim 3
Dependent Claim
17 words
The method according to claim 1, wherein the second opening exposes a doped region of the metal-oxide-semiconductor.
Claim 4
Dependent Claim
17 words
The method according to claim 1, wherein the insulation layer includes a silicon oxide/silicon nitride/silicon oxide layer.
Claim 5
Dependent Claim
25 words
The method according to claim 1, wherein the fourth oxide layer, the second poly-silicon layer, and the first poly-silicon layer are removed by chemical-mechanical polishing.
Claim 6
Independent Claim
175 words
A method of fabricating a capacitor, wherein a semiconductor substrate having a metal-oxide-semiconductor is provided, comprising: forming a first oxide layer, a silicon nitride layer, a second oxide layer, and a first poly-silicon layer on the substrate in sequence; patterning the first poly-silicon layer, the second oxide layer, and the silicon nitride layer to form a first opening, so that the first oxide layer within the first opening is exposed; forming a third oxide layer over the substrate; etching the third oxide layer and the first oxide layer to form a second opening to expose the substrate; forming a second poly-silicon layer over the substrate; forming a fourth oxide layer on the second poly-silicon layer; removing the fourth oxide layer, the second poly-silicon layer, and the first poly-silicon layer until the second oxide layer is exposed; wet etching the remaining fourth oxide layer and the second oxide layer with the silicon nitride layer as an etch stop; forming an insulation layer over the silicon substrate; and forming a third poly-silicon layer on the insulation layer.
Claim 7
Independent Claim
175 words
A method of fabricating a capacitor, wherein a semiconductor substrate having a metal-oxide-semiconductor is provided, comprising: forming a first oxide layer, a silicon nitride layer, a second oxide layer, and a first poly-silicon layer on the substrate in sequence; patterning the first poly-silicon layer, the second oxide layer, and the silicon nitride layer to form a first opening, so that the first oxide layer within the first opening is exposed; forming a third oxide layer over the substrate; etching the third oxide layer and the first oxide layer to form a second opening to expose the substrate; forming a second poly-silicon layer over the substrate; forming a fourth oxide layer on the second poly-silicon layer; removing the fourth oxide layer, the second poly-silicon layer, and the first poly-silicon layer until the second oxide layer is exposed; wet etching the remaining fourth oxide layer and the second oxide layer with the silicon nitride layer as an etch stop; forming an insulation layer over the silicon substrate; and forming a third poly-silicon layer on the insulation layer.
Claim 8
Dependent Claim
17 words
The method according to claim 5, wherein the second opening exposes a doped region of the metal-oxide-semiconductor.
Claim 9
Dependent Claim
16 words
The method according to claim 5, wherein insulation layer includes a silicon oxide/silicon nitride/silicon oxide layer.
Claim 10
Dependent Claim
25 words
The method according to claim 5, wherein the fourth oxide layer, the second poly-silicon layer, and the first poly-silicon layer are removed by chemical-mechanical polishing.
References Cited (Backward Citations)
DE4102184A1
Cited
US5726084A
Cited
US5443993A
Cited
US5484744A
Cited
DE19610272A1
Cited
US5693554A
Cited
US5552334A
Cited
US5670410A
Cited
US5811344A
Cited
US5943582A
Cited
US5849617A
Cited
US5904565A
Cited
US5854119A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-03-14 | 2003-09-13 | 2004-03-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-03-14 | 2007-09-13 | 2008-03-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-03-14 | 2011-09-13 | 2012-03-14 | $7700.00 | Window Closed / Lapsed |