US5811344A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of forming a capacitor of a dram cell
Assignee: Hanger Solutions LLC
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Filing: 1997-01-27
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Granted: 1998-09-22
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Expires: 2017-01-27
Abstract
Abstract The present invention relates to a stacked capacitor of a DRAM cell, particully remarkably increasing a surface area of a storage electrode of a stacked capacitor without increasing an occupation area and a complexity of fabrication thereof. According to the invention, by use of depositing a protection polysilicon layer on a rugged polysilicon layer, which can provide an increased surface area of a storage electrode, a chemical oxide layer underlying the rugged polysilicon layer is protected by the protection polysilicon layer during a HF dip and thus a peeling of the rugged polysilicon layer as a result of the chemical oxide loss will not occur, thereby preventing a production yield loss.
Inventors
- 👤 Tuby Tu
- 👤 Kuang-Chao Chen
- 👤 May Wang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 17:02
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/712; H10D1/714
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
125 words
A method of forming a capacitor of a DRAM cell, comprising the steps of: forming a field oxide, a gate oxide, source/drain regions, and a polysilicon gate over a silicon substrate; depositing a dielectric layer of SiO 2 ; forming a contact window by exposing through a contact mask, developing and etching the dielectric layer of SiO 2 ; depositing a pad polysilicon layer; forming a chemical oxide by immersing wafers in a SPM solution, which is a mixed solution of H 2 SO 4 and H 2 O 2 ; forming a rugged polysilicon layer after depositing an amorphous silicon layer and then annealing; depositing a protection polysilicon layer; depositing a dielectric layer of ONO; and depositing a polysilicon layer as a plate electrode.
Claim 2
Independent Claim
125 words
A method of forming a capacitor of a DRAM cell, comprising the steps of: forming a field oxide, a gate oxide, source/drain regions, and a polysilicon gate over a silicon substrate; depositing a dielectric layer of SiO 2 ; forming a contact window by exposing through a contact mask, developing and etching the dielectric layer of SiO 2 ; depositing a pad polysilicon layer; forming a chemical oxide by immersing wafers in a SPM solution, which is a mixed solution of H 2 SO 4 and H 2 O 2 ; forming a rugged polysilicon layer after depositing an amorphous silicon layer and then annealing; depositing a protection polysilicon layer; depositing a dielectric layer of ONO; and depositing a polysilicon layer as a plate electrode.
Claim 3
Dependent Claim
26 words
A method of forming a capacitor of a DRAM cell according to claim 1, wherein the protection polysilicon layer is replaced by an amorphous silicon layer.
Claim 4
Dependent Claim
26 words
A method of forming a capacitor of a DRAM cell according to claim 1 further comprising a HF dip before forming a dielectric layer of ONO.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-09-21 | 2002-03-23 | 2002-09-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-09-21 | 2006-03-23 | 2006-09-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-09-21 | 2010-03-23 | 2010-09-22 | $7700.00 | Window Closed / Lapsed |