Semiconductor device including stacked chips having metal patterned on circuit surface and one edge side of chip

Claim 1

A method for the fabrication of a three-dimensional microcircuit chip assembly comprising the steps of: a) providing at least two circuit chips having circuit contacts on the edge side of each chip; b) providing at least one dielectric spacer having first and second uncured adhesive films on opposite surfaces thereof, respectively; c) said spacer having substantially the same length and width as said chips, except that the width of the spacer is slightly less than the width of the chips; d) stacking said chips and spacer in exact alignment, so that each adjacent pair of chips is separated by a spacer, and so that the edge-side contacts of each chip are located just beyond the edges of the spacers, respectively; e) heating the stacked assembly to a temperature and for a time suitable for curing said adhesive films; and f) placing solder bumps on the edge-side contacts of each chip.

Claim 2

A method for the fabrication of a three-dimensional microcircuit chip assembly comprising the steps of: a) providing at least two circuit chips having circuit contacts on the edge side of each chip; b) providing at least one dielectric spacer having first and second uncured adhesive films on opposite surfaces thereof, respectively; c) said spacer having substantially the same length and width as said chips, except that the width of the spacer is slightly less than the width of the chips; d) stacking said chips and spacer in exact alignment, so that each adjacent pair of chips is separated by a spacer, and so that the edge-side contacts of each chip are located just beyond the edges of the spacers, respectively; e) heating the stacked assembly to a temperature and for a time suitable for curing said adhesive films; and f) placing solder bumps on the edge-side contacts of each chip.