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US5327327A Expired / Lapsed US ⏱️ 0.0 years remaining

Three dimensional assembly of integrated circuit chips

Assignee: Texas Instruments Inc
•
Filing: 1992-10-30
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Granted: 1994-07-05
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Expires: 2012-10-30
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Abstract

Abstract The multi-chip circuit module of the invention comprises a plurality of circuit chips assembled in a laminated stack. Each chip includes a plurality of layers of thin film interconnect patterns in the normal configuration, except for the final layer or layers, which comprise a reroute pattern that locates all circuit input and output pads along a single edge of each chip. The relocated pads are provided with contact bumps to facilitate the addition of a bonded lead to each I/O pad extending therefrom to a point beyond the edge of each chip. Thus, upon lamination the protruding tips form an array of leads on a single lateral face of the laminated chip stack.

Inventors

  • 👤 Dean L. Frew
  • 👤 Mark A. Kressley
  • 👤 Arthur M. Wilson
  • 👤 Juanita G. Miller
  • 👤 Philip E. Hecker, Jr.
  • 👤 James Drumm
  • 👤 Randall E. Johnson
  • 👤 Rick Elder

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 00:15
CPC Classifications
H; H10; H10W; H10W90/00; H10W72/00; H10W72/01; H10W72/60; H10W72/834; H10W90/20

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 92 words
A multi-chip circuit module comprising a plurality of circuit chips assembled in a laminated stack, each of said chips having a plurality of layers of thin-film interconnect patterns thereon, a final layer of which comprises a reroute pattern that locates all circuit input and output pads along a single edge of each chip, and further including a bonded lead extending from each rerouted I/O pad to a point beyond said single edge of each chip, whereby an array of protruding lead tips extends from a single lateral face of said laminated stack.
Claim 2
Dependent Claim 92 words
A multi-chip circuit module comprising a plurality of circuit chips assembled in a laminated stack, each of said chips having a plurality of layers of thin-film interconnect patterns thereon, a final layer of which comprises a reroute pattern that locates all circuit input and output pads along a single edge of each chip, and further including a bonded lead extending from each rerouted I/O pad to a point beyond said single edge of each chip, whereby an array of protruding lead tips extends from a single lateral face of said laminated stack.
Claim 3
Dependent Claim 56 words
The multichip circuit module as in claim 1, further including a second set of relocated input and output pads along the opposite edge of said chip, and further including a first set of bonded leads extending from said second set of pads, whereby testing of electrical connections to the first set of bonded leads is facilitated.
Claim 4
Dependent Claim 23 words
The multichip circuit module as in claim 1, wherein said reroute patent comprises a film having two sublayers of titanium-tungsten separated by aluminum.
Claim 5
Dependent Claim 24 words
The multichip circuit module as in claim 1, wherein said bonded leads comprises gold-plated copper, attached to tin-plated gold bumps on each pad, respectively.

References Cited (Backward Citations)

US4646128A Cited
US4525921A Cited
US4617160A Cited
US4704319A Cited
US4706166A Cited
US4764846A Cited
US4983533A Cited
US5025306A Cited
US5104820A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-07-04 1998-01-03 1998-07-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-07-04 2002-01-03 2002-07-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-07-04 2006-01-03 2006-07-05 $7700.00 Window Closed / Lapsed

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