Patent US5986932A successfully refreshed from Google Patents.
US5986932A
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Non-volatile static random access memory and methods for using same
Assignee: Monterey Research LLC
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Filing: 1997-06-30
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Granted: 1999-11-16
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Expires: 2017-06-30
Abstract
Abstract The state of a memory cell is stored by selectively imbalancing threshold voltages of storage elements of the memory cell. The threshold voltages may be selectively imbalanced by pulsing the supply voltage for the memory cell from an operating voltage level to a programming voltage level. This may be accomplished by raising the supply voltage from the operating voltage level to the programming voltage level for a period of time sufficient to store the state of the memory cell by monitoring the leakage current from the programming voltage level such that it just falls below a preestablished limit. Alternatively, the supply voltage may be repeatedly toggled between the operating voltage level and the programming voltage level for fixed time intervals until the state of the memory cell is stored. The number of toggling operations may be determined by monitoring the leakage current such that it just falls exceeds a predetermined limit. The programming voltage level may be approximately twice the operating voltage level or greater. Selectively imbalancing the threshold voltages of the storage elements may be accomplished by creating a first electric field within a first of the storage elements to tunnel electrons off of a floating gate of the first storage element and creating a second electric field within a second of the storage elements to inject the electrons onto a floating gate of the second storage element. Preferably, these electric fields are created simultaneously by applying the programming voltage to the memory cell.
Inventors
- 👤 K. Nirmal Ratnakumar
- 👤 Frederick B. Jenne
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 04:52
CPC Classifications
G; G11; G11C; G11C14/00
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
82 words
A method of storing a state of a memory cell comprising the step of selectively imbalancing threshold voltages of storage elements of said memory cell by raising a supply voltage from an operating voltage level to a programming voltage level for a predetermined period of time sufficient to store said state of said memory cell as determined by monitoring a leakage current of a memory array including said memory cell from a source of said supply voltage at said programming voltage level.
Claim 2
Independent Claim
82 words
A method of storing a state of a memory cell comprising the step of selectively imbalancing threshold voltages of storage elements of said memory cell by raising a supply voltage from an operating voltage level to a programming voltage level for a predetermined period of time sufficient to store said state of said memory cell as determined by monitoring a leakage current of a memory array including said memory cell from a source of said supply voltage at said programming voltage level.
Claim 3
Dependent Claim
32 words
A method as in claim 1 wherein the predetermined period of time is controlled by said monitoring such that said storage element of said memory cells do not enter a conducting state.
Claim 4
Independent Claim
58 words
A method of storing a state of a memory cell comprising the step of selectively imbalancing threshold voltages of storage elements of said memory cell by repeatedly toggling a supply voltage for said memory cell between an operating voltage level and a programming voltage level for predetermined time intervals until said state of said memory cell is stored.
Claim 5
Independent Claim
58 words
A method of storing a state of a memory cell comprising the step of selectively imbalancing threshold voltages of storage elements of said memory cell by repeatedly toggling a supply voltage for said memory cell between an operating voltage level and a programming voltage level for predetermined time intervals until said state of said memory cell is stored.
Claim 6
Dependent Claim
53 words
A method as in claim 3 wherein said step of repeating toggling said supply voltage is performed a number of times according to a leakage current level determined by monitoring a leakage current of a memory array including said memory cell from a source of said supply voltage at said operating voltage level.
Claim 7
Dependent Claim
42 words
A method as in claim 4 wherein the number of times said step of toggling is performed is controlled by said step of monitoring said leakage current such that said storage elements of said memory cells do not enter a conducting state.
Claim 8
Dependent Claim
20 words
A method as in claim 1 wherein said programming voltage level is approximately twice said operating voltage level or greater.
Claim 9
Dependent Claim
68 words
A method as in claim 1 wherein said step of selectively imbalancing threshold voltages further comprises the steps of: creating a first electric field within a first of said storage elements to tunnel electrons off a floating gate of said first storage element; and creating a second electric filed within a second of said storage elements to inject electrons onto a floating gate of said second storage element.
Claim 10
Dependent Claim
17 words
A method as in claim 7 wherein said first and said second electric fields are created simultaneously.
Claim 11
Dependent Claim
17 words
A method as in claim 8 wherein said programming voltage level is approximately twice said operating voltage.
Claim 12
Independent Claim
92 words
A method comprising: raising a supply voltage to a memory cell from an operating voltage level to a programming voltage level to store a first state of said memory cell; removing said supply voltage from said memory cell; energizing said memory cell to said operating voltage level to recover a second state of said memory cell, said second state being a logical inverse of said first state; and repeatedly toggling said supply voltage between said operating voltage level and said programming voltage level to recover said first state of said memory cell.
Claim 13
Independent Claim
92 words
A method comprising: raising a supply voltage to a memory cell from an operating voltage level to a programming voltage level to store a first state of said memory cell; removing said supply voltage from said memory cell; energizing said memory cell to said operating voltage level to recover a second state of said memory cell, said second state being a logical inverse of said first state; and repeatedly toggling said supply voltage between said operating voltage level and said programming voltage level to recover said first state of said memory cell.
Claim 14
Independent Claim
64 words
A method comprising raising a supply voltage to a memory cell from an operating voltage level to a programming voltage level to store a first state of said memory cell; removing said supply voltage from said memory cell; and selectively imbalancing threshold voltages of storage elements of said memory cell in a dummy storage operation to recall said first state of said memory cell.
Claim 15
Independent Claim
64 words
A method comprising raising a supply voltage to a memory cell from an operating voltage level to a programming voltage level to store a first state of said memory cell; removing said supply voltage from said memory cell; and selectively imbalancing threshold voltages of storage elements of said memory cell in a dummy storage operation to recall said first state of said memory cell.
Claim 16
Dependent Claim
58 words
A method as in claim 11 wherein said dummy storage operation imbalances said threshold voltages of said storage elements in a direction opposite to an imbalance created during said step of raising a supply voltage to a memory cell from an operating voltage level to a programming voltage level to store a first state of said memory cell.
Claim 17
Dependent Claim
59 words
A memory comprising a memory cell having a stored state, which is the result of a programming operation wherein threshold voltages of storage elements of the memory cell were selectively imbalanced as the result of a supply voltage of the memory cell being repeatedly toggled between an operating voltage level and a programming voltage level for predetermined time intervals.
Claim 18
Dependent Claim
59 words
A memory comprising a memory cell having a stored state, which is the result of a programming operation wherein threshold voltages of storage elements of the memory cell were selectively imbalanced as the result of a supply voltage of the memory cell being repeatedly toggled between an operating voltage level and a programming voltage level for predetermined time intervals.
Claim 19
Dependent Claim
17 words
A memory as in claim 13 wherein said storage elements comprise a pair of stacked gate transistors.
Claim 20
Dependent Claim
23 words
A memory as in claim 14 wherein each of said stacked gate transistors is fabricated in an n-well of a p-type semiconductor substrate.
Claim 21
Dependent Claim
19 words
A memory as in claim 15 wherein said semiconductor substrate further includes transistors comprising latch elements of said cell.
Claim 22
Dependent Claim
9 words
A computer system comprising the memory of claim 13.
Claim 23
Dependent Claim
68 words
A method as in claim 3 wherein said step of selectively imbalancing threshold voltages further comprises the steps of: creating a first electric field within a first of said storage elements to tunnel electrons off a floating gate of said first storage element; and creating a second electric filed within a second of said storage elements to inject electrons onto a floating gate of said second storage element.
Claim 24
Dependent Claim
17 words
A method as in claim 18 wherein said first and said second electric fields are created simultaneously.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2002-11-15 | 2003-05-17 | 2003-11-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-11-15 | 2007-05-17 | 2007-11-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-11-15 | 2011-05-17 | 2011-11-16 | $7700.00 | Window Closed / Lapsed |