US5981372A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for manufacturing a semiconductor device
Assignee: Fujitsu Ltd
•
Filing: 1996-12-05
•
Granted: 1999-11-09
•
Expires: 2016-12-05
Abstract
Abstract A metal utilized for forming a silicide film is left even after completion of the reaction to produce silicide. A conductive film made of a material other than the metal is grown on the metal. A local interconnection overlapping the silicide layer is formed by the conductive film and the metal remaining after formation of silicide.
Inventors
- 👤 Hiroshi Goto
- 👤 Hiromi Hayashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 07:31
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/0698
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
98 words
A method for manufacturing a semiconductor device comprising the steps of: growing a cobalt metallic layer on a semiconductor layer at least within a device formation region; forming an alloy layer between said semiconductor layer and said metallic layer on a surface of said semiconductor layer by heating; forming a conductive laser from a material comprising no cobalt component on said metallic layer; patterning said conductive layer to cover part of said alloy layer; and selectively etching said metallic layer which is not alloyed using said patterned conductive layer as an etching mask therein forming a local interconnection.
Claim 2
Independent Claim
98 words
A method for manufacturing a semiconductor device comprising the steps of: growing a cobalt metallic layer on a semiconductor layer at least within a device formation region; forming an alloy layer between said semiconductor layer and said metallic layer on a surface of said semiconductor layer by heating; forming a conductive laser from a material comprising no cobalt component on said metallic layer; patterning said conductive layer to cover part of said alloy layer; and selectively etching said metallic layer which is not alloyed using said patterned conductive layer as an etching mask therein forming a local interconnection.
Claim 3
Dependent Claim
27 words
The method for manufacturing a semiconductor device according to claim 1, wherein said semiconductor layer is a silicon layer and said alloy layer is a silicide layer.
Claim 4
Dependent Claim
33 words
The method for manufacturing a semiconductor device according to claim 1, said conductive layer is made of one selected among from a group consisting of tungsten, a tungsten compound and a titanium compound.
Claim 5
Dependent Claim
52 words
The method for manufacturing a semiconductor device according to claim 1, wherein a cap layer is formed from a material other than that utilized to form said metallic layer after forming said metallic layer, and said cap layer is selectively removed before said heating step but after formation of said conductive layer.
Claim 6
Dependent Claim
42 words
The method for manufacturing a semiconductor device according to claim 4, said cap layer is made of titanium nitride and said conductive layer is made of one selected among from a group consisting of tungsten, a tungsten compound and a titanium compound.
Claim 7
Dependent Claim
42 words
The method for manufacturing a semiconductor device according to claim 1, wherein said conductive layer is formed by sputtering, and said method further comprises a step of etching a surface of said metallic layer by reverse sputtering before forming said conductive layer.
Claim 8
Dependent Claim
25 words
The method for manufacturing a semiconductor device according to claim 1, wherein said local interconnection interconnects a plurality of conductive regions through no contact hole.
Claim 9
Dependent Claim
39 words
The method for manufacturing a semiconductor device according to claim 1, wherein said patterned conductive layer and a portion of said metallic layer covered by said patterned conductive layer is a contact pad formed on an impurity diffusion layer.
References Cited (Backward Citations)
US4384301A
Cited
US4545116A
Cited
US4657628A
Cited
US5010032A
Cited
US4804636A
Cited
US4821085A
Cited
US4975756A
Cited
US4890141A
Cited
US4675073A
Cited
JPH02139A
Cited
US4957590A
Cited
US4863559A
Cited
US4793896A
Cited
US4863559B1
Cited
US4793896C1
Cited
US4980020A
Cited
US5122225A
Cited
US5139974A
Cited
US5190893A
Cited
US5319245A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-11-08 | 2003-05-10 | 2003-11-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-11-08 | 2007-05-10 | 2007-11-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-11-08 | 2011-05-10 | 2011-11-09 | $7700.00 | Window Closed / Lapsed |