US5962897A
Expired / Lapsed
US
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Semiconductor device and method for forming the same
Assignee: Semiconductor Energy Laboratory Co Ltd
•
Filing: 1997-06-30
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Granted: 1999-10-05
•
Expires: 2017-06-30
Abstract
Abstract A thin film transistor device incorporates a silicide film contacting the source and drain. The silicide layer substantially reduces parasitic resistance between the source and drain of the device, improving the performance of the TFT. The silicide layer may be formed by covering the silicon semiconductor with a metal and irradiating the metal with a laser to initiate a reaction with the adjacent silicon to produce a silicide film. The layer may also be formed by rigidly adhering a metal coating to the exposed source and drain regions using a triangular-shaped insulator, and allowing the metal to react with silicon.
Inventors
- 👤 Yasuhiko Takemura
- 👤 Hongyong Zhang
- 👤 Satoshi Teramoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 22:22
CPC Classifications
H; H10; H10D; H10D86/00; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/6729; H10D30/6737; H10D30/6739; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6755; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D86/40; H10D86/441; H10D86/60; H10D30/6757; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
130 words
A semiconductor device comprising: a pair of impurity semiconductor regions having an impurity conductivity type formed on an insulating surface; a channel semiconductor region extending between said pair of impurity semiconductor regions; an offset region provided continuously from said channel semiconductor region; a gate insulating film formed on said channel semiconductor region; a gate electrode formed on said gate insulating film; and an anodic oxide layer formed on a side surface of said gate electrode; a pair of side wall insulators provided adjacent to opposed sides of said gate electrode with said anodic oxide layer therebetween; and a pair of metal silicide regions provided on said impurity semiconductor regions, wherein one of said impurity semiconductor regions and corresponding one of said metal silicide regions are provided outside said offset region.
Claim 2
Dependent Claim
130 words
A semiconductor device comprising: a pair of impurity semiconductor regions having an impurity conductivity type formed on an insulating surface; a channel semiconductor region extending between said pair of impurity semiconductor regions; an offset region provided continuously from said channel semiconductor region; a gate insulating film formed on said channel semiconductor region; a gate electrode formed on said gate insulating film; and an anodic oxide layer formed on a side surface of said gate electrode; a pair of side wall insulators provided adjacent to opposed sides of said gate electrode with said anodic oxide layer therebetween; and a pair of metal silicide regions provided on said impurity semiconductor regions, wherein one of said impurity semiconductor regions and corresponding one of said metal silicide regions are provided outside said offset region.
Claim 3
Dependent Claim
26 words
The device of claim 1 wherein said insulating surface is a surface of a glass or a surface of an insulating film provided on a glass.
Claim 4
Dependent Claim
41 words
The device of claim 1 wherein said metal silicide regions comprise a material selected from the group consisting of TiSi, TiSi 2 , WSi 2 , W(SiAl) 2 , Ti 7 Si 12 Al 5 and Pd 4 SiAl 3 .
Claim 5
Dependent Claim
159 words
A semiconductor device comprising: a pair of impurity semiconductor regions having an impurity conductivity type formed on an insulating surface; a channel semiconductor region extending between said pair of impurity semiconductor regions; an offset region provided between said channel semiconductor region and one of said impurity semiconductor regions; a gate insulating film formed on said channel semiconductor region; a gate electrode formed on said gate insulating film; an anodic oxide layer formed on a side surface of said gate electrode; a pair of side wall insulators provided adjacent to opposed sides of said gate electrode with said anodic oxide layer therebetween; and a pair of metal silicide regions, wherein said offset region extends from a side of said gate electrode to said one of said impurity semiconductor regions, said one of said impurity semiconductor regions is provided outside said offset region, and corresponding one of said metal silicide regions is provided outside said one of said impurity semiconductor regions.
Claim 6
Dependent Claim
159 words
A semiconductor device comprising: a pair of impurity semiconductor regions having an impurity conductivity type formed on an insulating surface; a channel semiconductor region extending between said pair of impurity semiconductor regions; an offset region provided between said channel semiconductor region and one of said impurity semiconductor regions; a gate insulating film formed on said channel semiconductor region; a gate electrode formed on said gate insulating film; an anodic oxide layer formed on a side surface of said gate electrode; a pair of side wall insulators provided adjacent to opposed sides of said gate electrode with said anodic oxide layer therebetween; and a pair of metal silicide regions, wherein said offset region extends from a side of said gate electrode to said one of said impurity semiconductor regions, said one of said impurity semiconductor regions is provided outside said offset region, and corresponding one of said metal silicide regions is provided outside said one of said impurity semiconductor regions.
Claim 7
Dependent Claim
26 words
The device of claim 4 wherein said insulating surface is a surface of a glass or a surface of an insulating film provided on a glass.
Claim 8
Dependent Claim
41 words
The device of claim 4 wherein said metal silicide regions comprise a material selected from the group consisting of TiSi, TiSi 2 , WSi 2 , W(SiAl) 2 , Ti 7 Si 12 Al 5 and Pd 4 SiAl 3 .
Claim 9
Dependent Claim
127 words
A semiconductor device comprising: a pair of impurity semiconductor regions formed on an insulating surface and having an impurity conductivity type; a channel semiconductor region extending between said pair of impurity semiconductor regions; a gate insulating film formed on said channel semiconductor region; a gate electrode formed on said gate insulating film; an anodic oxide layer formed on a side surface of said gate electrode; a side wall insulator provided adjacent to said gate electrode with said anodic oxide layer interposed therebetween at least over one of said pair of impurity semiconductor regions that forms a drain region of said semiconductor device; and a pair of metal silicide regions each being formed in a top and side portions of the corresponding one of said impurity semiconductor regions.
Claim 10
Dependent Claim
127 words
A semiconductor device comprising: a pair of impurity semiconductor regions formed on an insulating surface and having an impurity conductivity type; a channel semiconductor region extending between said pair of impurity semiconductor regions; a gate insulating film formed on said channel semiconductor region; a gate electrode formed on said gate insulating film; an anodic oxide layer formed on a side surface of said gate electrode; a side wall insulator provided adjacent to said gate electrode with said anodic oxide layer interposed therebetween at least over one of said pair of impurity semiconductor regions that forms a drain region of said semiconductor device; and a pair of metal silicide regions each being formed in a top and side portions of the corresponding one of said impurity semiconductor regions.
Claim 11
Dependent Claim
12 words
The semiconductor device of claim 7 wherein said gate electrode comprises aluminum.
Claim 12
Dependent Claim
14 words
The semiconductor device of claim 7 wherein said gate electrode consists essentially of aluminum.
Claim 13
Dependent Claim
26 words
The device of claim 7 wherein said insulating surface is a surface of a glass or a surface of an insulating film provided on a glass.
Claim 14
Dependent Claim
41 words
The device of claim 7 wherein said metal silicide regions comprise a material selected from the group consisting of TiSi, TiSi 2 , WSi 2 , W(SiAl) 2 , Ti 7 Si 12 Al 5 and Pd 4 SiAl 3 .
Claim 15
Dependent Claim
180 words
A semiconductor device comprising: a pair of impurity semiconductor regions formed on an insulating surface and having an impurity conductivity type; a channel semiconductor region extending between said pair of impurity semiconductor regions; a gate insulating film formed on said channel semiconductor region; a gate electrode formed on said gate insulating film; an anodic oxide layer formed on a side surface of said gate electrode; a pair of side wall insulators provided adjacent to opposed sides of said gate electrode with said anodic oxide layer interposed therebetween; and a pair of metal silicide regions, each of said pair of metal silicide regions being in contact with corresponding one of said impurity semiconductor regions at a side of each of said pair of metal silicide regions and being in contact with said insulating surface at a bottom of each of said pair of said metal silicide regions, wherein inner edges of said metal silicide regions are aligned with outer edges of said side wall insulators, and wherein said metal silicide regions contain the same dopant impurity as said impurity semiconductor regions.
Claim 16
Dependent Claim
180 words
A semiconductor device comprising: a pair of impurity semiconductor regions formed on an insulating surface and having an impurity conductivity type; a channel semiconductor region extending between said pair of impurity semiconductor regions; a gate insulating film formed on said channel semiconductor region; a gate electrode formed on said gate insulating film; an anodic oxide layer formed on a side surface of said gate electrode; a pair of side wall insulators provided adjacent to opposed sides of said gate electrode with said anodic oxide layer interposed therebetween; and a pair of metal silicide regions, each of said pair of metal silicide regions being in contact with corresponding one of said impurity semiconductor regions at a side of each of said pair of metal silicide regions and being in contact with said insulating surface at a bottom of each of said pair of said metal silicide regions, wherein inner edges of said metal silicide regions are aligned with outer edges of said side wall insulators, and wherein said metal silicide regions contain the same dopant impurity as said impurity semiconductor regions.
Claim 17
Dependent Claim
33 words
The semiconductor device of claim 12 wherein each boundary between said channel region and said pair of impurity semiconductor regions is substantially aligned with a corresponding outer edge of said anodic oxide layer.
Claim 18
Dependent Claim
33 words
The semiconductor device of claim 12 wherein said gate insulating film extends beyond outer edges of said anodic oxide layer so that said side wall insulators are isolated from said impurity semiconductor regions.
Claim 19
Dependent Claim
12 words
The semiconductor device of claim 12 wherein said gate electrode comprises aluminum.
Claim 20
Dependent Claim
14 words
The semiconductor device of claim 12 wherein said gate electrode consists essentially of aluminum.
Claim 21
Dependent Claim
50 words
The device of claim 12 wherein said side wall insulators are provided on a side of a source and on a side of a drain where the source is provided in one of said impurity semiconductor regions, and the drain is provided in the other of said impurity semiconductor regions.
Claim 22
Dependent Claim
23 words
The device of claim 12 wherein said side wall insulators are in contact with said gate insulating film and said anodic oxide layer.
Claim 23
Dependent Claim
23 words
The device of claim 12 wherein said side wall insulators are in contact with said impurity semiconductor regions and said anodic oxide layer.
Claim 24
Dependent Claim
26 words
The device of claim 12 wherein said insulating surface is a surface of a glass or a surface of an insulating film provided on a glass.
Claim 25
Dependent Claim
41 words
The device of claim 12 wherein said metal silicide regions comprise a material selected from the group consisting of TiSi, TiSi 2 , WSi 2 , W(SiAl) 2 , Ti 7 Si 12 Al 5 and Pd 4 SiAl 3 .
Claim 26
Dependent Claim
134 words
A semiconductor device comprising: a pair of impurity semiconductor regions formed on an insulating surface and having an impurity conductivity type; a channel semiconductor region extending between said pair of impurity semiconductor regions; a gate insulating film formed on said channel semiconductor region; a gate electrode formed on said gate insulating film; an anodic oxide layer formed on a side surface of said gate electrode; a pair of side wall insulators provided adjacent to opposed sides of said gate electrode and having outer side edges; and a pair of metal silicide regions having a thickness substantially the same as said pair of impurity semiconductor regions, wherein an edge of at least one of said metal silicide regions is substantially aligned with one of said outer side edges of said pair of side wall insulators.
Claim 27
Dependent Claim
134 words
A semiconductor device comprising: a pair of impurity semiconductor regions formed on an insulating surface and having an impurity conductivity type; a channel semiconductor region extending between said pair of impurity semiconductor regions; a gate insulating film formed on said channel semiconductor region; a gate electrode formed on said gate insulating film; an anodic oxide layer formed on a side surface of said gate electrode; a pair of side wall insulators provided adjacent to opposed sides of said gate electrode and having outer side edges; and a pair of metal silicide regions having a thickness substantially the same as said pair of impurity semiconductor regions, wherein an edge of at least one of said metal silicide regions is substantially aligned with one of said outer side edges of said pair of side wall insulators.
Claim 28
Dependent Claim
50 words
The device of claim 22 wherein said side wall insulators are provided on a side of a source and on a side of a drain where the source is provided in one of said impurity semiconductor regions, and the drain is provided in the other of said impurity semiconductor regions.
Claim 29
Dependent Claim
23 words
The device of claim 22 wherein said side wall insulators are in contact with said gate insulating film and said anodic oxide layer.
Claim 30
Dependent Claim
23 words
The device of claim 22 wherein said side wall insulators are in contact with said impurity semiconductor regions and said anodic oxide layer.
Claim 31
Dependent Claim
26 words
The device of claim 22 wherein said insulating surface is a surface of a glass or a surface of an insulating film provided on a glass.
References Cited (Backward Citations)
US34658A
Cited
US4336550A
Cited
USRE34658E
Cited
JPS5799775A
Cited
JPS584180A
Cited
JPS5823479A
Cited
US4468855A
Cited
US4378628A
Cited
US4769686A
Cited
US4554572A
Cited
JPS60245174A
Cited
JPS63318779A
Cited
JPH01114070A
Cited
JPH0296375A
Cited
US5656826A
Cited
US4899202A
Cited
JPH0242419A
Cited
JPH02207537A
Cited
JPH02228041A
Cited
US4923822A
Cited
JPH03203322A
Cited
JPH04106982A
Cited
US5341028A
Cited
JPH04162679A
Cited
JPH04186775A
Cited
JPH04196171A
Cited
US5289030A
Cited
JPH04360580A
Cited
JPH04362616A
Cited
US5308998A
Cited
JPH05173179A
Cited
JPH05315355A
Cited
JPH05343426A
Cited
US5252502A
Cited
US5359219A
Cited
JPH0738115A
Cited
US5576556A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-10-04 | 2003-04-05 | 2003-10-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-10-04 | 2007-04-05 | 2007-10-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-10-04 | 2011-04-05 | 2011-10-05 | $7700.00 | Window Closed / Lapsed |